@@ -172,11 +172,6 @@ static DecodeStatus s32_0ImmDecoder(MCInst &MI, unsigned tmp,
172172                                    const  MCDisassembler *Decoder);
173173static  DecodeStatus brtargetDecoder (MCInst &MI, unsigned  tmp, uint64_t  Address,
174174                                    const  MCDisassembler *Decoder);
175- 
176- static  DecodeStatus decodeCRSWAP10 (MCInst &Inst, unsigned  Bits,
177-                                    uint64_t  Address,
178-                                    const  MCDisassembler *Decoder);
179- 
180175#include  " HexagonDepDecoders.inc" 
181176#include  " HexagonGenDisassemblerTables.inc" 
182177
@@ -531,6 +526,9 @@ DecodeStatus HexagonDisassembler::getSingleInstruction(MCInst &MI, MCInst &MCB,
531526    MI.insert (MI.begin () + 1 ,
532527              MCOperand::createExpr (MCConstantExpr::create (-1 , getContext ())));
533528    break ;
529+   case  Hexagon::Y4_crswap10:
530+     MI.addOperand (MCOperand::createReg (Hexagon::SGP1_0));
531+     break ;
534532  default :
535533    break ;
536534  }
@@ -846,16 +844,6 @@ static DecodeStatus brtargetDecoder(MCInst &MI, unsigned tmp, uint64_t Address,
846844  return  MCDisassembler::Success;
847845}
848846
849- static  DecodeStatus decodeCRSWAP10 (MCInst &Inst, unsigned  int  Bits,
850-                                    uint64_t  Address,
851-                                    const  MCDisassembler *Decoder) {
852-   unsigned  RegNo = fieldFromInstruction (Bits, 16 , 5 );
853-   DecodeDoubleRegsRegisterClass (Inst, RegNo, Address, Decoder);
854-   DecodeDoubleRegsRegisterClass (Inst, RegNo, Address, Decoder);
855-   Inst.addOperand (MCOperand::createReg (Hexagon::SGP1_0));
856-   return  MCDisassembler::Success;
857- }
858- 
859847static  const  uint16_t  SysRegDecoderTable[] = {
860848    Hexagon::SGP0,       Hexagon::SGP1,      Hexagon::STID,
861849    Hexagon::ELR,        Hexagon::BADVA0,    Hexagon::BADVA1,
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