@@ -1180,15 +1180,16 @@ void SIWholeQuadMode::toExact(MachineBasicBlock &MBB,
11801180 }
11811181 }
11821182
1183+ const DebugLoc &DL = MBB.findDebugLoc (Before);
11831184 MachineInstr *MI;
11841185
11851186 if (SaveWQM) {
11861187 unsigned Opcode = IsTerminator ? AndSaveExecTermOpc : AndSaveExecOpc;
1187- MI = BuildMI (MBB, Before, DebugLoc () , TII->get (Opcode), SaveWQM)
1188+ MI = BuildMI (MBB, Before, DL , TII->get (Opcode), SaveWQM)
11881189 .addReg (LiveMaskReg);
11891190 } else {
11901191 unsigned Opcode = IsTerminator ? AndTermOpc : AndOpc;
1191- MI = BuildMI (MBB, Before, DebugLoc () , TII->get (Opcode), Exec)
1192+ MI = BuildMI (MBB, Before, DL , TII->get (Opcode), Exec)
11921193 .addReg (Exec)
11931194 .addReg (LiveMaskReg);
11941195 }
@@ -1200,13 +1201,14 @@ void SIWholeQuadMode::toExact(MachineBasicBlock &MBB,
12001201void SIWholeQuadMode::toWQM (MachineBasicBlock &MBB,
12011202 MachineBasicBlock::iterator Before,
12021203 Register SavedWQM) {
1204+ const DebugLoc &DL = MBB.findDebugLoc (Before);
12031205 MachineInstr *MI;
12041206
12051207 if (SavedWQM) {
1206- MI = BuildMI (MBB, Before, DebugLoc () , TII->get (AMDGPU::COPY), Exec)
1208+ MI = BuildMI (MBB, Before, DL , TII->get (AMDGPU::COPY), Exec)
12071209 .addReg (SavedWQM);
12081210 } else {
1209- MI = BuildMI (MBB, Before, DebugLoc () , TII->get (WQMOpc), Exec).addReg (Exec);
1211+ MI = BuildMI (MBB, Before, DL , TII->get (WQMOpc), Exec).addReg (Exec);
12101212 }
12111213
12121214 LIS->InsertMachineInstrInMaps (*MI);
@@ -1221,12 +1223,14 @@ void SIWholeQuadMode::toStrictMode(MachineBasicBlock &MBB,
12211223 assert (StrictStateNeeded == StateStrictWWM ||
12221224 StrictStateNeeded == StateStrictWQM);
12231225
1226+ const DebugLoc &DL = MBB.findDebugLoc (Before);
1227+
12241228 if (StrictStateNeeded == StateStrictWWM) {
1225- MI = BuildMI (MBB, Before, DebugLoc () , TII->get (AMDGPU::ENTER_STRICT_WWM),
1229+ MI = BuildMI (MBB, Before, DL , TII->get (AMDGPU::ENTER_STRICT_WWM),
12261230 SaveOrig)
12271231 .addImm (-1 );
12281232 } else {
1229- MI = BuildMI (MBB, Before, DebugLoc () , TII->get (AMDGPU::ENTER_STRICT_WQM),
1233+ MI = BuildMI (MBB, Before, DL , TII->get (AMDGPU::ENTER_STRICT_WQM),
12301234 SaveOrig)
12311235 .addImm (-1 );
12321236 }
@@ -1244,12 +1248,14 @@ void SIWholeQuadMode::fromStrictMode(MachineBasicBlock &MBB,
12441248 assert (CurrentStrictState == StateStrictWWM ||
12451249 CurrentStrictState == StateStrictWQM);
12461250
1251+ const DebugLoc &DL = MBB.findDebugLoc (Before);
1252+
12471253 if (CurrentStrictState == StateStrictWWM) {
1248- MI = BuildMI (MBB, Before, DebugLoc () , TII->get (AMDGPU::EXIT_STRICT_WWM),
1254+ MI = BuildMI (MBB, Before, DL , TII->get (AMDGPU::EXIT_STRICT_WWM),
12491255 Exec)
12501256 .addReg (SavedOrig);
12511257 } else {
1252- MI = BuildMI (MBB, Before, DebugLoc () , TII->get (AMDGPU::EXIT_STRICT_WQM),
1258+ MI = BuildMI (MBB, Before, DL , TII->get (AMDGPU::EXIT_STRICT_WQM),
12531259 Exec)
12541260 .addReg (SavedOrig);
12551261 }
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