@@ -39,6 +39,7 @@ class SPIRVLegalizeImplicitBinding : public ModulePass {
3939 void collectBindingInfo (Module &M);
4040 uint32_t getAndReserveFirstUnusedBinding (uint32_t DescSet);
4141 void replaceImplicitBindingCalls (Module &M);
42+ void verifyUniqueOrderIdPerResource (SmallVectorImpl<CallInst *> &Calls);
4243
4344 // A map from descriptor set to a bit vector of used binding numbers.
4445 std::vector<BitVector> UsedBindings;
@@ -92,30 +93,31 @@ void SPIRVLegalizeImplicitBinding::collectBindingInfo(Module &M) {
9293 cast<ConstantInt>(B->getArgOperand (OrderIdArgIdx))->getZExtValue ();
9394 return OrderA < OrderB;
9495 });
96+ }
9597
98+ void SPIRVLegalizeImplicitBinding::verifyUniqueOrderIdPerResource (
99+ SmallVectorImpl<CallInst *> &Calls) {
96100 // Check that the order Id is unique per resource.
97- for (uint32_t i = 1 ; i < ImplicitBindingCalls .size (); ++i) {
101+ for (uint32_t i = 1 ; i < Calls .size (); ++i) {
98102 const uint32_t OrderIdArgIdx = 0 ;
99103 const uint32_t DescSetArgIdx = 1 ;
100104 const uint32_t OrderA =
101- cast<ConstantInt>(
102- ImplicitBindingCalls[i - 1 ]->getArgOperand (OrderIdArgIdx))
105+ cast<ConstantInt>(Calls[i - 1 ]->getArgOperand (OrderIdArgIdx))
103106 ->getZExtValue ();
104107 const uint32_t OrderB =
105- cast<ConstantInt>(ImplicitBindingCalls [i]->getArgOperand (OrderIdArgIdx))
108+ cast<ConstantInt>(Calls [i]->getArgOperand (OrderIdArgIdx))
106109 ->getZExtValue ();
107110 if (OrderA == OrderB) {
108111 const uint32_t DescSetA =
109- cast<ConstantInt>(
110- ImplicitBindingCalls[i - 1 ]->getArgOperand (DescSetArgIdx))
112+ cast<ConstantInt>(Calls[i - 1 ]->getArgOperand (DescSetArgIdx))
111113 ->getZExtValue ();
112114 const uint32_t DescSetB =
113- cast<ConstantInt>(
114- ImplicitBindingCalls[i]->getArgOperand (DescSetArgIdx))
115+ cast<ConstantInt>(Calls[i]->getArgOperand (DescSetArgIdx))
115116 ->getZExtValue ();
116- assert (DescSetA == DescSetB &&
117- " If two implicit binding calls have the same order ID, they must "
118- " also have the same descriptor set." );
117+ if (DescSetA != DescSetB) {
118+ report_fatal_error (" Implicit binding calls with the same order ID must "
119+ " have the same descriptor set" );
120+ }
119121 }
120122 }
121123}
@@ -180,6 +182,7 @@ bool SPIRVLegalizeImplicitBinding::runOnModule(Module &M) {
180182 if (ImplicitBindingCalls.empty ()) {
181183 return false ;
182184 }
185+ verifyUniqueOrderIdPerResource (ImplicitBindingCalls);
183186
184187 replaceImplicitBindingCalls (M);
185188 return true ;
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