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[LLD] Merge .hexagon.attributes sections
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‎lld/ELF/Arch/Hexagon.cpp‎

Lines changed: 121 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -7,11 +7,19 @@
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//===----------------------------------------------------------------------===//
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#include "InputFiles.h"
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#include "OutputSections.h"
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#include "Symbols.h"
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#include "SyntheticSections.h"
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#include "Target.h"
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#include "Thunks.h"
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#include "lld/Common/ErrorHandler.h"
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#include "llvm/ADT/SmallVector.h"
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#include "llvm/BinaryFormat/ELF.h"
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#include "llvm/Support/ELFAttributes.h"
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#include "llvm/Support/Endian.h"
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#include "llvm/Support/HexagonAttributeParser.h"
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#include "llvm/Support/HexagonAttributes.h"
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#include "llvm/Support/LEB128.h"
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using namespace llvm;
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using namespace llvm::object;
@@ -415,4 +423,117 @@ int64_t Hexagon::getImplicitAddend(const uint8_t *buf, RelType type) const {
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}
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}
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namespace {
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class HexagonAttributesSection final : public SyntheticSection {
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public:
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HexagonAttributesSection(Ctx &ctx)
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: SyntheticSection(ctx, ".hexagon.attributes", SHT_HEXAGON_ATTRIBUTES, 0,
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1) {}
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size_t getSize() const override { return size; }
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void writeTo(uint8_t *buf) override;
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static constexpr StringRef vendor = "hexagon";
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DenseMap<unsigned, unsigned> intAttr;
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size_t size = 0;
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};
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} // namespace
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static HexagonAttributesSection *
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mergeAttributesSection(Ctx &ctx,
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const SmallVector<InputSectionBase *, 0> &sections) {
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ctx.in.hexagonAttributes = std::make_unique<HexagonAttributesSection>(ctx);
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auto &merged =
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static_cast<HexagonAttributesSection &>(*ctx.in.hexagonAttributes);
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// Collect all tags values from attributes section.
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const auto &attributesTags = HexagonAttrs::getHexagonAttributeTags();
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for (const InputSectionBase *sec : sections) {
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HexagonAttributeParser parser;
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if (Error e = parser.parse(sec->content(), llvm::endianness::little))
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Warn(ctx) << sec << ": " << std::move(e);
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for (const auto &tag : attributesTags) {
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switch (HexagonAttrs::AttrType(tag.attr)) {
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case HexagonAttrs::ARCH:
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case HexagonAttrs::HVXARCH:
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if (auto i = parser.getAttributeValue(tag.attr)) {
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auto r = merged.intAttr.try_emplace(tag.attr, *i);
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if (!r.second && r.first->second != *i) {
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if (r.first->second < *i)
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r.first->second = *i;
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}
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}
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continue;
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case HexagonAttrs::HVXIEEEFP:
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case HexagonAttrs::HVXQFLOAT:
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case HexagonAttrs::ZREG:
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case HexagonAttrs::AUDIO:
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case HexagonAttrs::CABAC:
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if (auto i = parser.getAttributeValue(tag.attr)) {
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auto r = merged.intAttr.try_emplace(tag.attr, *i);
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if (!r.second && r.first->second != *i) {
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r.first->second |= *i;
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}
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}
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continue;
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}
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}
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}
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// The total size of headers: format-version [ <section-length> "vendor-name"
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// [ <file-tag> <size>.
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size_t size = 5 + merged.vendor.size() + 1 + 5;
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for (auto &attr : merged.intAttr)
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if (attr.second != 0)
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size += getULEB128Size(attr.first) + getULEB128Size(attr.second);
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merged.size = size;
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return &merged;
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}
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void HexagonAttributesSection::writeTo(uint8_t *buf) {
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const size_t size = getSize();
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uint8_t *const end = buf + size;
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*buf = ELFAttrs::Format_Version;
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write32(ctx, buf + 1, size - 1);
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buf += 5;
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memcpy(buf, vendor.data(), vendor.size());
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buf += vendor.size() + 1;
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*buf = ELFAttrs::File;
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write32(ctx, buf + 1, end - buf);
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buf += 5;
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for (auto &attr : intAttr) {
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if (attr.second == 0)
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continue;
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buf += encodeULEB128(attr.first, buf);
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buf += encodeULEB128(attr.second, buf);
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}
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}
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void elf::mergeHexagonAttributesSections(Ctx &ctx) {
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// Find the first input SHT_HEXAGON_ATTRIBUTES; return if not found.
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size_t place =
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llvm::find_if(ctx.inputSections,
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[](auto *s) { return s->type == SHT_HEXAGON_ATTRIBUTES; }) -
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ctx.inputSections.begin();
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if (place == ctx.inputSections.size())
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return;
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// Extract all SHT_HEXAGON_ATTRIBUTES sections into `sections`.
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SmallVector<InputSectionBase *, 0> sections;
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llvm::erase_if(ctx.inputSections, [&](InputSectionBase *s) {
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if (s->type != SHT_HEXAGON_ATTRIBUTES)
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return false;
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sections.push_back(s);
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return true;
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});
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// Add the merged section.
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ctx.inputSections.insert(ctx.inputSections.begin() + place,
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mergeAttributesSection(ctx, sections));
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}
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418539
void elf::setHexagonTargetInfo(Ctx &ctx) { ctx.target.reset(new Hexagon(ctx)); }

‎lld/ELF/Config.h‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -569,6 +569,7 @@ struct UndefinedDiag {
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struct InStruct {
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std::unique_ptr<InputSection> attributes;
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std::unique_ptr<SyntheticSection> riscvAttributes;
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std::unique_ptr<SyntheticSection> hexagonAttributes;
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std::unique_ptr<BssSection> bss;
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std::unique_ptr<BssSection> bssRelRo;
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std::unique_ptr<SyntheticSection> gnuProperty;

‎lld/ELF/Driver.cpp‎

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Original file line numberDiff line numberDiff line change
@@ -3450,6 +3450,10 @@ template <class ELFT> void LinkerDriver::link(opt::InputArgList &args) {
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if (ctx.arg.emachine == EM_RISCV)
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mergeRISCVAttributesSections(ctx);
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// Merge .hexagon.attributes sections.
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if (ctx.arg.emachine == EM_HEXAGON)
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mergeHexagonAttributesSections(ctx);
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{
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llvm::TimeTraceScope timeScope("Assign sections");
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‎lld/ELF/Target.h‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -245,6 +245,7 @@ template <typename ELFT> void writeARMCmseImportLib(Ctx &);
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uint64_t getLoongArchPageDelta(uint64_t dest, uint64_t pc, RelType type);
246246
void riscvFinalizeRelax(int passes);
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void mergeRISCVAttributesSections(Ctx &);
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void mergeHexagonAttributesSections(Ctx &);
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void addArmInputSectionMappingSymbols(Ctx &);
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void addArmSyntheticSectionMappingSymbol(Defined *);
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void sortArmMappingSymbols(Ctx &);

‎lld/test/ELF/hexagon-attributes.s‎

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Original file line numberDiff line numberDiff line change
@@ -0,0 +1,150 @@
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# REQUIRES: hexagon
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# RUN: rm -rf %t && split-file %s %t && cd %t
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# RUN: llvm-mc -filetype=obj -triple=hexagon-unknown-elf a.s -o a.o
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# RUN: ld.lld -e 0 a.o -o out 2>&1 | count 0
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# RUN: llvm-readelf -S -l --arch-specific out | FileCheck %s --check-prefixes=HDR,CHECK
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# RUN: ld.lld -e 0 a.o a.o -o out1 2>&1 | count 0
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# RUN: llvm-readobj --arch-specific out1 | FileCheck %s
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# RUN: ld.lld -r a.o a.o -o out1 2>&1 | count 0
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# RUN: llvm-readobj --arch-specific out1 | FileCheck %s
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# RUN: llvm-mc -filetype=obj -triple=hexagon-unknown-elf b.s -o b.o
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# RUN: llvm-mc -filetype=obj -triple=hexagon-unknown-elf c.s -o c.o
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# RUN: llvm-mc -filetype=obj -triple=hexagon-unknown-elf d.s -o d.o
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# RUN: ld.lld a.o b.o c.o -o out2
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# RUN: llvm-readobj --arch-specific out2 | FileCheck %s --check-prefix=CHECK2
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# RUN: ld.lld a.o b.o c.o d.o -o out3
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# RUN: llvm-readobj --arch-specific out3 | FileCheck %s --check-prefix=CHECK3
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# HDR: Name Type Address Off Size ES Flg Lk Inf Al
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# HDR: .hexagon.attributes HEXAGON_ATTRIBUTES 00000000 {{.*}} {{.*}} 00 0 0 1{{$}}
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# HDR: Type Offset VirtAddr PhysAddr FileSiz MemSiz Flg Align
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# HDR: LOAD {{.*}}
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# HDR-NEXT: GNU_STACK {{.*}}
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# CHECK: BuildAttributes {
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# CHECK-NEXT: FormatVersion: 0x41
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# CHECK-NEXT: Section 1 {
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# CHECK-NEXT: SectionLength: 19
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# CHECK-NEXT: Vendor: hexagon
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# CHECK-NEXT: Tag: Tag_File (0x1)
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# CHECK-NEXT: Size: 7
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# CHECK-NEXT: FileAttributes {
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# CHECK-NEXT: Attribute {
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# CHECK-NEXT: Tag: 4
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# CHECK-NEXT: TagName: arch
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# CHECK-NEXT: Value: 68{{$}}
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# CHECK-NEXT: }
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# CHECK-NEXT: }
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# CHECK-NEXT: }
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# CHECK-NEXT: }
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# CHECK2: BuildAttributes {
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# CHECK2-NEXT: FormatVersion: 0x41
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# CHECK2-NEXT: Section 1 {
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# CHECK2-NEXT: SectionLength: 21
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# CHECK2-NEXT: Vendor: hexagon
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# CHECK2-NEXT: Tag: Tag_File (0x1)
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# CHECK2-NEXT: Size: 9
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# CHECK2-NEXT: FileAttributes {
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# CHECK2-NEXT: Attribute {
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# CHECK2-NEXT: Tag: 4
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# CHECK2-NEXT: TagName: arch
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# CHECK2-NEXT: Value: 68{{$}}
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# CHECK2-NEXT: }
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# CHECK2-NEXT: Attribute {
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# CHECK2-NEXT: Tag: 5
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# CHECK2-NEXT: TagName: hvx_arch
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# CHECK2-NEXT: Value: 68{{$}}
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# CHECK2-NEXT: }
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# CHECK2-NEXT: }
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# CHECK2-NEXT: }
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# CHECK2-NEXT: }
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# CHECK3: BuildAttributes {
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# CHECK3-NEXT: FormatVersion: 0x41
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# CHECK3-NEXT: Section 1 {
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# CHECK3-NEXT: SectionLength: 25
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# CHECK3-NEXT: Vendor: hexagon
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# CHECK3-NEXT: Tag: Tag_File (0x1)
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# CHECK3-NEXT: Size: 13
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# CHECK3-NEXT: FileAttributes {
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# CHECK3-NEXT: Attribute {
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# CHECK3-NEXT: Tag: 7
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# CHECK3-NEXT: TagName: hvx_qfloat
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# CHECK3-NEXT: Value: 68{{$}}
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# CHECK3-NEXT: }
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# CHECK3-NEXT: Attribute {
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# CHECK3-NEXT: Tag: 9
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# CHECK3-NEXT: TagName: audio
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# CHECK3-NEXT: Value: 68{{$}}
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# CHECK3-NEXT: }
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# CHECK3-NEXT: Attribute {
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# CHECK3-NEXT: Tag: 4
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# CHECK3-NEXT: TagName: arch
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# CHECK3-NEXT: Value: 68{{$}}
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# CHECK3-NEXT: }
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# CHECK3-NEXT: Attribute {
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# CHECK3-NEXT: Tag: 5
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# CHECK3-NEXT: TagName: hvx_arch
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# CHECK3-NEXT: Value: 68{{$}}
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# CHECK3-NEXT: }
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# CHECK3-NEXT: }
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# CHECK3-NEXT: }
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# CHECK3-NEXT: }
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#--- a.s
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.section .hexagon.attributes,"",@0x70000003
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.byte 0x41
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.long .Lend-.hexagon.attributes-1
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.asciz "hexagon"
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.Lbegin:
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.byte 1
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.long .Lend-.Lbegin
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.byte 4
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.byte 68
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.Lend:
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#--- b.s
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.section .hexagon.attributes,"",@0x70000003
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.byte 0x41
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.long .Lend1-.hexagon.attributes-1
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.asciz "hexagon"
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.Lbegin1:
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.byte 1
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.long .Lend1-.Lbegin1
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.byte 4
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.byte 68
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.Lend1:
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#--- c.s
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.section .hexagon.attributes,"",@0x70000003
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.byte 0x41
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.long .Lend2-.hexagon.attributes-1
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.asciz "hexagon"
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.Lbegin2:
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.byte 1
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.long .Lend2-.Lbegin2
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.byte 4
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.byte 68
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.byte 5
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.byte 68
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.Lend2:
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#--- d.s
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.section .hexagon.attributes,"",@0x70000003
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.byte 0x41
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.long .Lend3-.hexagon.attributes-1
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.asciz "hexagon"
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.Lbegin3:
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.byte 1
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.long .Lend3-.Lbegin3
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.byte 4
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.byte 68
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.byte 7
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.byte 68
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.byte 9
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.byte 68
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.Lend3:

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