@@ -1791,3 +1791,54 @@ define i32 @test_umin_sub1_nuw_drop_flags(i32 %x, i32 range(i32 1, 0) %w) {
17911791 %r = select i1 %cmp , i32 %x , i32 %sub
17921792 ret i32 %r
17931793}
1794+
1795+ ;; Confirm we don't crash on these cases.
1796+ define i32 @test_smin_or_neg1_nsw (i32 %x , i32 %w ) {
1797+ ; CHECK-LABEL: @test_smin_or_neg1_nsw(
1798+ ; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], [[W:%.*]]
1799+ ; CHECK-NEXT: [[R:%.*]] = select i1 [[CMP]], i32 [[X]], i32 -1
1800+ ; CHECK-NEXT: ret i32 [[R]]
1801+ ;
1802+ %cmp = icmp slt i32 %x , %w
1803+ %sub = or disjoint i32 %w , -1
1804+ %r = select i1 %cmp , i32 %x , i32 %sub
1805+ ret i32 %r
1806+ }
1807+
1808+ define i32 @test_smax_or_1_nsw (i32 %x , i32 %w ) {
1809+ ; CHECK-LABEL: @test_smax_or_1_nsw(
1810+ ; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[X:%.*]], [[W:%.*]]
1811+ ; CHECK-NEXT: [[ADD:%.*]] = or disjoint i32 [[W]], 1
1812+ ; CHECK-NEXT: [[R:%.*]] = select i1 [[CMP]], i32 [[X]], i32 [[ADD]]
1813+ ; CHECK-NEXT: ret i32 [[R]]
1814+ ;
1815+ %cmp = icmp sgt i32 %x , %w
1816+ %add = or disjoint i32 %w , 1
1817+ %r = select i1 %cmp , i32 %x , i32 %add
1818+ ret i32 %r
1819+ }
1820+
1821+ define i32 @test_umax_or_1_nuw (i32 %x , i32 %w ) {
1822+ ; CHECK-LABEL: @test_umax_or_1_nuw(
1823+ ; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[X:%.*]], [[W:%.*]]
1824+ ; CHECK-NEXT: [[ADD:%.*]] = or disjoint i32 [[W]], 1
1825+ ; CHECK-NEXT: [[R:%.*]] = select i1 [[CMP]], i32 [[X]], i32 [[ADD]]
1826+ ; CHECK-NEXT: ret i32 [[R]]
1827+ ;
1828+ %cmp = icmp ugt i32 %x , %w
1829+ %add = or disjoint i32 %w , 1
1830+ %r = select i1 %cmp , i32 %x , i32 %add
1831+ ret i32 %r
1832+ }
1833+
1834+ define i32 @test_umin_or_neg1_nuw (i32 %x , i32 range(i32 1 , 0 ) %w ) {
1835+ ; CHECK-LABEL: @test_umin_or_neg1_nuw(
1836+ ; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[X:%.*]], [[W:%.*]]
1837+ ; CHECK-NEXT: [[R:%.*]] = select i1 [[CMP]], i32 [[X]], i32 -1
1838+ ; CHECK-NEXT: ret i32 [[R]]
1839+ ;
1840+ %cmp = icmp ult i32 %x , %w
1841+ %sub = or disjoint i32 %w , -1
1842+ %r = select i1 %cmp , i32 %x , i32 %sub
1843+ ret i32 %r
1844+ }
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