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‎llvm/include/llvm/TargetParser/Triple.h‎

Lines changed: 58 additions & 58 deletions
Original file line numberDiff line numberDiff line change
@@ -48,64 +48,64 @@ class Triple {
4848
enum ArchType {
4949
UnknownArch,
5050

51-
arm, // ARM (little endian): arm, armv.*, xscale
52-
armeb, // ARM (big endian): armeb
53-
aarch64, // AArch64 (little endian): aarch64
54-
aarch64_be, // AArch64 (big endian): aarch64_be
55-
aarch64_32, // AArch64 (little endian) ILP32: aarch64_32
56-
arc, // ARC: Synopsys ARC
57-
avr, // AVR: Atmel AVR microcontroller
58-
bpfel, // eBPF or extended BPF or 64-bit BPF (little endian)
59-
bpfeb, // eBPF or extended BPF or 64-bit BPF (big endian)
60-
csky, // CSKY: csky
61-
dxil, // DXIL 32-bit DirectX bytecode
62-
hexagon, // Hexagon: hexagon
63-
loongarch32, // LoongArch (32-bit): loongarch32
64-
loongarch64, // LoongArch (64-bit): loongarch64
65-
m68k, // M68k: Motorola 680x0 family
66-
mips, // MIPS: mips, mipsallegrex, mipsr6
67-
mipsel, // MIPSEL: mipsel, mipsallegrexe, mipsr6el
68-
mips64, // MIPS64: mips64, mips64r6, mipsn32, mipsn32r6
69-
mips64el, // MIPS64EL: mips64el, mips64r6el, mipsn32el, mipsn32r6el
70-
msp430, // MSP430: msp430
71-
ppc, // PPC: powerpc
72-
ppcle, // PPCLE: powerpc (little endian)
73-
ppc64, // PPC64: powerpc64, ppu
74-
ppc64le, // PPC64LE: powerpc64le
75-
r600, // R600: AMD GPUs HD2XXX - HD6XXX
76-
amdgcn, // AMDGCN: AMD GCN GPUs
77-
riscv32, // RISC-V (32-bit, little endian): riscv32
78-
riscv64, // RISC-V (64-bit, little endian): riscv64
79-
riscv32be, // RISC-V (32-bit, big endian): riscv32be
80-
riscv64be, // RISC-V (64-bit, big endian): riscv64be
81-
sparc, // Sparc: sparc
82-
sparcv9, // Sparcv9: Sparcv9
83-
sparcel, // Sparc: (endianness = little). NB: 'Sparcle' is a CPU variant
84-
systemz, // SystemZ: s390x
85-
tce, // TCE (http://tce.cs.tut.fi/): tce
86-
tcele, // TCE little endian (http://tce.cs.tut.fi/): tcele
87-
thumb, // Thumb (little endian): thumb, thumbv.*
88-
thumbeb, // Thumb (big endian): thumbeb
89-
x86, // X86: i[3-9]86
90-
x86_64, // X86-64: amd64, x86_64
91-
xcore, // XCore: xcore
92-
xtensa, // Tensilica: Xtensa
93-
nvptx, // NVPTX: 32-bit
94-
nvptx64, // NVPTX: 64-bit
95-
amdil, // AMDIL
96-
amdil64, // AMDIL with 64-bit pointers
97-
hsail, // AMD HSAIL
98-
hsail64, // AMD HSAIL with 64-bit pointers
99-
spir, // SPIR: standard portable IR for OpenCL 32-bit version
100-
spir64, // SPIR: standard portable IR for OpenCL 64-bit version
101-
spirv, // SPIR-V with logical memory layout.
102-
spirv32, // SPIR-V with 32-bit pointers
103-
spirv64, // SPIR-V with 64-bit pointers
104-
kalimba, // Kalimba: generic kalimba
105-
shave, // SHAVE: Movidius vector VLIW processors
106-
lanai, // Lanai: Lanai 32-bit
107-
wasm32, // WebAssembly with 32-bit pointers
108-
wasm64, // WebAssembly with 64-bit pointers
51+
arm, // ARM (little endian): arm, armv.*, xscale
52+
armeb, // ARM (big endian): armeb
53+
aarch64, // AArch64 (little endian): aarch64
54+
aarch64_be, // AArch64 (big endian): aarch64_be
55+
aarch64_32, // AArch64 (little endian) ILP32: aarch64_32
56+
arc, // ARC: Synopsys ARC
57+
avr, // AVR: Atmel AVR microcontroller
58+
bpfel, // eBPF or extended BPF or 64-bit BPF (little endian)
59+
bpfeb, // eBPF or extended BPF or 64-bit BPF (big endian)
60+
csky, // CSKY: csky
61+
dxil, // DXIL 32-bit DirectX bytecode
62+
hexagon, // Hexagon: hexagon
63+
loongarch32, // LoongArch (32-bit): loongarch32
64+
loongarch64, // LoongArch (64-bit): loongarch64
65+
m68k, // M68k: Motorola 680x0 family
66+
mips, // MIPS: mips, mipsallegrex, mipsr6
67+
mipsel, // MIPSEL: mipsel, mipsallegrexe, mipsr6el
68+
mips64, // MIPS64: mips64, mips64r6, mipsn32, mipsn32r6
69+
mips64el, // MIPS64EL: mips64el, mips64r6el, mipsn32el, mipsn32r6el
70+
msp430, // MSP430: msp430
71+
ppc, // PPC: powerpc
72+
ppcle, // PPCLE: powerpc (little endian)
73+
ppc64, // PPC64: powerpc64, ppu
74+
ppc64le, // PPC64LE: powerpc64le
75+
r600, // R600: AMD GPUs HD2XXX - HD6XXX
76+
amdgcn, // AMDGCN: AMD GCN GPUs
77+
riscv32, // RISC-V (32-bit, little endian): riscv32
78+
riscv64, // RISC-V (64-bit, little endian): riscv64
79+
riscv32be, // RISC-V (32-bit, big endian): riscv32be
80+
riscv64be, // RISC-V (64-bit, big endian): riscv64be
81+
sparc, // Sparc: sparc
82+
sparcv9, // Sparcv9: Sparcv9
83+
sparcel, // Sparc: (endianness = little). NB: 'Sparcle' is a CPU variant
84+
systemz, // SystemZ: s390x
85+
tce, // TCE (http://tce.cs.tut.fi/): tce
86+
tcele, // TCE little endian (http://tce.cs.tut.fi/): tcele
87+
thumb, // Thumb (little endian): thumb, thumbv.*
88+
thumbeb, // Thumb (big endian): thumbeb
89+
x86, // X86: i[3-9]86
90+
x86_64, // X86-64: amd64, x86_64
91+
xcore, // XCore: xcore
92+
xtensa, // Tensilica: Xtensa
93+
nvptx, // NVPTX: 32-bit
94+
nvptx64, // NVPTX: 64-bit
95+
amdil, // AMDIL
96+
amdil64, // AMDIL with 64-bit pointers
97+
hsail, // AMD HSAIL
98+
hsail64, // AMD HSAIL with 64-bit pointers
99+
spir, // SPIR: standard portable IR for OpenCL 32-bit version
100+
spir64, // SPIR: standard portable IR for OpenCL 64-bit version
101+
spirv, // SPIR-V with logical memory layout.
102+
spirv32, // SPIR-V with 32-bit pointers
103+
spirv64, // SPIR-V with 64-bit pointers
104+
kalimba, // Kalimba: generic kalimba
105+
shave, // SHAVE: Movidius vector VLIW processors
106+
lanai, // Lanai: Lanai 32-bit
107+
wasm32, // WebAssembly with 32-bit pointers
108+
wasm64, // WebAssembly with 64-bit pointers
109109
renderscript32, // 32-bit RenderScript
110110
renderscript64, // 64-bit RenderScript
111111
ve, // NEC SX-Aurora Vector Engine

‎llvm/lib/TargetParser/Triple.cpp‎

Lines changed: 67 additions & 67 deletions
Original file line numberDiff line numberDiff line change
@@ -431,73 +431,73 @@ static Triple::ArchType parseBPFArch(StringRef ArchName) {
431431
Triple::ArchType Triple::getArchTypeForLLVMName(StringRef Name) {
432432
Triple::ArchType BPFArch(parseBPFArch(Name));
433433
return StringSwitch<Triple::ArchType>(Name)
434-
.Case("aarch64", aarch64)
435-
.Case("aarch64_be", aarch64_be)
436-
.Case("aarch64_32", aarch64_32)
437-
.Case("arc", arc)
438-
.Case("arm64", aarch64) // "arm64" is an alias for "aarch64"
439-
.Case("arm64_32", aarch64_32)
440-
.Case("arm", arm)
441-
.Case("armeb", armeb)
442-
.Case("avr", avr)
443-
.StartsWith("bpf", BPFArch)
444-
.Case("m68k", m68k)
445-
.Case("mips", mips)
446-
.Case("mipsel", mipsel)
447-
.Case("mips64", mips64)
448-
.Case("mips64el", mips64el)
449-
.Case("msp430", msp430)
450-
.Case("ppc64", ppc64)
451-
.Case("ppc32", ppc)
452-
.Case("ppc", ppc)
453-
.Case("ppc32le", ppcle)
454-
.Case("ppcle", ppcle)
455-
.Case("ppc64le", ppc64le)
456-
.Case("r600", r600)
457-
.Case("amdgcn", amdgcn)
458-
.Case("riscv32", riscv32)
459-
.Case("riscv64", riscv64)
460-
.Case("riscv32be", riscv32be)
461-
.Case("riscv64be", riscv64be)
462-
.Case("hexagon", hexagon)
463-
.Case("sparc", sparc)
464-
.Case("sparcel", sparcel)
465-
.Case("sparcv9", sparcv9)
466-
.Case("s390x", systemz)
467-
.Case("systemz", systemz)
468-
.Case("tce", tce)
469-
.Case("tcele", tcele)
470-
.Case("thumb", thumb)
471-
.Case("thumbeb", thumbeb)
472-
.Case("x86", x86)
473-
.Case("i386", x86)
474-
.Case("x86-64", x86_64)
475-
.Case("xcore", xcore)
476-
.Case("nvptx", nvptx)
477-
.Case("nvptx64", nvptx64)
478-
.Case("amdil", amdil)
479-
.Case("amdil64", amdil64)
480-
.Case("hsail", hsail)
481-
.Case("hsail64", hsail64)
482-
.Case("spir", spir)
483-
.Case("spir64", spir64)
484-
.Case("spirv", spirv)
485-
.Case("spirv32", spirv32)
486-
.Case("spirv64", spirv64)
487-
.Case("kalimba", kalimba)
488-
.Case("lanai", lanai)
489-
.Case("shave", shave)
490-
.Case("wasm32", wasm32)
491-
.Case("wasm64", wasm64)
492-
.Case("renderscript32", renderscript32)
493-
.Case("renderscript64", renderscript64)
494-
.Case("ve", ve)
495-
.Case("csky", csky)
496-
.Case("loongarch32", loongarch32)
497-
.Case("loongarch64", loongarch64)
498-
.Case("dxil", dxil)
499-
.Case("xtensa", xtensa)
500-
.Default(UnknownArch);
434+
.Case("aarch64", aarch64)
435+
.Case("aarch64_be", aarch64_be)
436+
.Case("aarch64_32", aarch64_32)
437+
.Case("arc", arc)
438+
.Case("arm64", aarch64) // "arm64" is an alias for "aarch64"
439+
.Case("arm64_32", aarch64_32)
440+
.Case("arm", arm)
441+
.Case("armeb", armeb)
442+
.Case("avr", avr)
443+
.StartsWith("bpf", BPFArch)
444+
.Case("m68k", m68k)
445+
.Case("mips", mips)
446+
.Case("mipsel", mipsel)
447+
.Case("mips64", mips64)
448+
.Case("mips64el", mips64el)
449+
.Case("msp430", msp430)
450+
.Case("ppc64", ppc64)
451+
.Case("ppc32", ppc)
452+
.Case("ppc", ppc)
453+
.Case("ppc32le", ppcle)
454+
.Case("ppcle", ppcle)
455+
.Case("ppc64le", ppc64le)
456+
.Case("r600", r600)
457+
.Case("amdgcn", amdgcn)
458+
.Case("riscv32", riscv32)
459+
.Case("riscv64", riscv64)
460+
.Case("riscv32be", riscv32be)
461+
.Case("riscv64be", riscv64be)
462+
.Case("hexagon", hexagon)
463+
.Case("sparc", sparc)
464+
.Case("sparcel", sparcel)
465+
.Case("sparcv9", sparcv9)
466+
.Case("s390x", systemz)
467+
.Case("systemz", systemz)
468+
.Case("tce", tce)
469+
.Case("tcele", tcele)
470+
.Case("thumb", thumb)
471+
.Case("thumbeb", thumbeb)
472+
.Case("x86", x86)
473+
.Case("i386", x86)
474+
.Case("x86-64", x86_64)
475+
.Case("xcore", xcore)
476+
.Case("nvptx", nvptx)
477+
.Case("nvptx64", nvptx64)
478+
.Case("amdil", amdil)
479+
.Case("amdil64", amdil64)
480+
.Case("hsail", hsail)
481+
.Case("hsail64", hsail64)
482+
.Case("spir", spir)
483+
.Case("spir64", spir64)
484+
.Case("spirv", spirv)
485+
.Case("spirv32", spirv32)
486+
.Case("spirv64", spirv64)
487+
.Case("kalimba", kalimba)
488+
.Case("lanai", lanai)
489+
.Case("shave", shave)
490+
.Case("wasm32", wasm32)
491+
.Case("wasm64", wasm64)
492+
.Case("renderscript32", renderscript32)
493+
.Case("renderscript64", renderscript64)
494+
.Case("ve", ve)
495+
.Case("csky", csky)
496+
.Case("loongarch32", loongarch32)
497+
.Case("loongarch64", loongarch64)
498+
.Case("dxil", dxil)
499+
.Case("xtensa", xtensa)
500+
.Default(UnknownArch);
501501
}
502502

503503
static Triple::ArchType parseARMArch(StringRef ArchName) {

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