[CIR][CIRGen][Builtin][X86] Masked compress Intrinsics

This pr is related to the issue #167765
Added the support Masked compress builtin in CIR codeGen

Author: Bhuvan1527

clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp

@@ -25,9 +25,16 @@ static mlir::Value emitIntrinsicCallOp(CIRGenBuilderTy &builder,
                                        mlir::Location loc, const StringRef str,
                                        const mlir::Type &resTy,
                                        Operands &&...op) {
+<<<<<<< HEAD
   return cir::LLVMIntrinsicCallOp::create(builder, loc,
+=======
+  CIRGenBuilderTy &builder = cgf.getBuilder();
+  mlir::Location location = cgf.getLoc(e->getExprLoc());
+  llvm::SmallVector<mlir::Value> operands{std::forward<Operands>(op)...};
+  return cir::LLVMIntrinsicCallOp::create(builder, location,
+>>>>>>> 320f8069e917 ([CIR][CIRGen][Builtin][X86] Masked compress Intrinsics)
                                           builder.getStringAttr(str), resTy,
-                                          std::forward<Operands>(op)...)
+                                          operands)
       .getResult();
 }
 
@@ -84,13 +91,10 @@ static mlir::Value getMaskVecValue(CIRGenBuilderTy &builder, mlir::Location loc,
   }
   return maskVec;
 }
-static mlir::Value emitX86CompressExpand(CIRGenFunction &cgf, const CallExpr *expr,ArrayRef<mlir::Value> ops, bool IsCompress, const std::string &ID){
-  auto ResultTy = cast<cir::VectorType>(ops[1].getType());
-  mlir::Value MaskValue = getMaskVecValue(cgf, expr, ops[2],  cast<cir::VectorType>(ResultTy).getSize());
-  llvm::SmallVector<mlir::Value, 4> op{ops[0], ops[1], MaskValue};
-  
-  return emitIntrinsicCallOp(cgf,expr, ID, ResultTy, op);
-
+static mlir::Value emitX86CompressExpand(CIRGenFunction &cgf, const CallExpr *expr, mlir::Value source, mlir::Value mask, mlir::Value inputVector, const std::string &id){
+  auto ResultTy = cast<cir::VectorType>(mask.getType());
+  mlir::Value MaskValue = getMaskVecValue(cgf, expr, inputVector,  cast<cir::VectorType>(ResultTy).getSize());
+  return emitIntrinsicCallOp(cgf,expr, id, ResultTy, source, mask, MaskValue);
 }
 
 mlir::Value CIRGenFunction::emitX86BuiltinExpr(unsigned builtinID,
@@ -447,6 +451,10 @@ mlir::Value CIRGenFunction::emitX86BuiltinExpr(unsigned builtinID,
   case X86::BI__builtin_ia32_expandqi128_mask:
   case X86::BI__builtin_ia32_expandqi256_mask:
   case X86::BI__builtin_ia32_expandqi512_mask:
+    cgm.errorNYI(expr->getSourceRange(),
+                 std::string("unimplemented X86 builtin call: ") +
+                     getContext().BuiltinInfo.getName(builtinID));
+    return {};
   case X86::BI__builtin_ia32_compressdf128_mask:
   case X86::BI__builtin_ia32_compressdf256_mask:
   case X86::BI__builtin_ia32_compressdf512_mask:
@@ -465,7 +473,7 @@ mlir::Value CIRGenFunction::emitX86BuiltinExpr(unsigned builtinID,
   case X86::BI__builtin_ia32_compressqi128_mask:
   case X86::BI__builtin_ia32_compressqi256_mask:
   case X86::BI__builtin_ia32_compressqi512_mask:{
-    return emitX86CompressExpand(*this, expr, ops, true, "x86_avx512_mask_compress");
+    return emitX86CompressExpand(*this, expr, ops[0], ops[1], ops[2], "x86_avx512_mask_compress");
   }
   case X86::BI__builtin_ia32_gather3div2df:
   case X86::BI__builtin_ia32_gather3div2di:

clang/test/CIR/CodeGenBuiltins/X86/avx512vlvbmi2-builtins.c

@@ -0,0 +1,27 @@
+
+// RUN: %clang_cc1 -x c -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-unknown-linux -target-feature +avx512vlvbmi2 -fclangir -emit-cir -o %t.cir -Wall -Werror -Wsign-conversion
+// RUN: FileCheck --check-prefix=CIR --input-file=%t.cir %s
+// RUN: %clang_cc1 -x c -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-unknown-linux -target-feature +avx512vlvbmi2 -fclangir -emit-llvm -o %t.ll -Wall -Werror -Wsign-conversion
+// RUN: FileCheck --check-prefixes=LLVM --input-file=%t.ll %s
+
+// RUN: %clang_cc1 -x c++ -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-unknown-linux -target-feature +avx512vlvbmi2 -fclangir -emit-cir -o %t.cir -Wall -Werror -Wsign-conversion
+// RUN: FileCheck --check-prefix=CIR --input-file=%t.cir %s
+// RUN: %clang_cc1 -x c++ -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-unknown-linux -target-feature +avx512vlvbmi2 -fclangir -emit-llvm -o %t.ll -Wall -Werror -Wsign-conversion
+// RUN: FileCheck --check-prefixes=LLVM --input-file=%t.ll %s
+
+#include <immintrin.h>
+
+__m128i test_mm_mask_compress_epi16(__m128i __S, __mmask8 __U, __m128i __D){
+    // CIR-LABEL: cir.func {{.*}}@test_mm_mask_compress_epi16
+    // CIR: call @_mm_mask_compress_epi16
+    // CIR: cir.return %{{.*}} : !cir.vector<8 x !cir.i16>
+
+    // LLVM-LABEL: @test_mm_mask_compress_epi16
+    // LLVM: store <8 x i16> zeroinitializer, ptr %[[A:.*]], align 16
+    // LLVM: %{{.*}} = load <8 x i16>, ptr %[[A]], align 16
+    // LLVM: ret <8 x i16> %{{.*}}
+
+    // OGCG-LABEL: test_mm_mask_compress_epi16
+    // OGCG: ret <8 x i16> zeroinitializer
+    return (__m128i)_mm_mask_compress_epi16(__S, __U, __D);
+}