|
| 1 | +import binascii |
| 2 | +import itertools |
| 3 | +import struct |
| 4 | + |
| 5 | +import gdbremote_testcase |
| 6 | +import lldbgdbserverutils |
| 7 | +from lldbsuite.support import seven |
| 8 | +from lldbsuite.test.decorators import * |
| 9 | +from lldbsuite.test.lldbtest import * |
| 10 | +from lldbsuite.test.lldbdwarf import * |
| 11 | +from lldbsuite.test import lldbutil, lldbplatformutil |
| 12 | + |
| 13 | + |
| 14 | +class TestGdbRemote_qMemoryRegion(gdbremote_testcase.GdbRemoteTestCaseBase): |
| 15 | + def test_qRegisterInfo_returns_one_valid_result(self): |
| 16 | + self.build() |
| 17 | + self.prep_debug_monitor_and_inferior() |
| 18 | + self.test_sequence.add_log_lines( |
| 19 | + [ |
| 20 | + "read packet: $qRegisterInfo0#00", |
| 21 | + { |
| 22 | + "direction": "send", |
| 23 | + "regex": r"^\$(.+);#[0-9A-Fa-f]{2}", |
| 24 | + "capture": {1: "reginfo_0"}, |
| 25 | + }, |
| 26 | + ], |
| 27 | + True, |
| 28 | + ) |
| 29 | + |
| 30 | + # Run the stream |
| 31 | + context = self.expect_gdbremote_sequence() |
| 32 | + self.assertIsNotNone(context) |
| 33 | + |
| 34 | + reg_info_packet = context.get("reginfo_0") |
| 35 | + self.assertIsNotNone(reg_info_packet) |
| 36 | + self.assert_valid_reg_info( |
| 37 | + lldbgdbserverutils.parse_reg_info_response(reg_info_packet) |
| 38 | + ) |
| 39 | + |
| 40 | + def test_qRegisterInfo_returns_all_valid_results(self): |
| 41 | + self.build() |
| 42 | + self.prep_debug_monitor_and_inferior() |
| 43 | + self.add_register_info_collection_packets() |
| 44 | + |
| 45 | + # Run the stream. |
| 46 | + context = self.expect_gdbremote_sequence() |
| 47 | + self.assertIsNotNone(context) |
| 48 | + |
| 49 | + # Validate that each register info returned validates. |
| 50 | + for reg_info in self.parse_register_info_packets(context): |
| 51 | + self.assert_valid_reg_info(reg_info) |
| 52 | + |
| 53 | + def test_qRegisterInfo_contains_required_generics_debugserver(self): |
| 54 | + self.build() |
| 55 | + self.prep_debug_monitor_and_inferior() |
| 56 | + self.add_register_info_collection_packets() |
| 57 | + |
| 58 | + # Run the packet stream. |
| 59 | + context = self.expect_gdbremote_sequence() |
| 60 | + self.assertIsNotNone(context) |
| 61 | + |
| 62 | + # Gather register info entries. |
| 63 | + reg_infos = self.parse_register_info_packets(context) |
| 64 | + |
| 65 | + # Collect all generic registers found. |
| 66 | + generic_regs = { |
| 67 | + reg_info["generic"]: 1 for reg_info in reg_infos if "generic" in reg_info |
| 68 | + } |
| 69 | + |
| 70 | + # Ensure we have a program counter register. |
| 71 | + self.assertIn("pc", generic_regs) |
| 72 | + |
| 73 | + # Ensure we have a frame pointer register. PPC64le's FP is the same as SP |
| 74 | + if self.getArchitecture() != "powerpc64le": |
| 75 | + self.assertIn("fp", generic_regs) |
| 76 | + |
| 77 | + # Ensure we have a stack pointer register. |
| 78 | + self.assertIn("sp", generic_regs) |
| 79 | + |
| 80 | + # Ensure we have a flags register. RISC-V doesn't have a flags register |
| 81 | + if not self.isRISCV(): |
| 82 | + self.assertIn("flags", generic_regs) |
| 83 | + |
| 84 | + if self.isRISCV() or self.isAArch64() or self.isARM(): |
| 85 | + # Specific register for a return address |
| 86 | + self.assertIn("ra", generic_regs) |
| 87 | + |
| 88 | + # Function arguments registers |
| 89 | + for i in range(1, 5 if self.isARM() else 9): |
| 90 | + self.assertIn(f"arg{i}", generic_regs) |
| 91 | + |
| 92 | + def test_qRegisterInfo_contains_at_least_one_register_set(self): |
| 93 | + self.build() |
| 94 | + self.prep_debug_monitor_and_inferior() |
| 95 | + self.add_register_info_collection_packets() |
| 96 | + |
| 97 | + # Run the packet stream. |
| 98 | + context = self.expect_gdbremote_sequence() |
| 99 | + self.assertIsNotNone(context) |
| 100 | + |
| 101 | + # Gather register info entries. |
| 102 | + reg_infos = self.parse_register_info_packets(context) |
| 103 | + |
| 104 | + # Collect all register sets found. |
| 105 | + register_sets = { |
| 106 | + reg_info["set"]: 1 for reg_info in reg_infos if "set" in reg_info |
| 107 | + } |
| 108 | + self.assertGreaterEqual(len(register_sets), 1) |
| 109 | + |
| 110 | + def targetHasAVX(self): |
| 111 | + triple = self.dbg.GetSelectedPlatform().GetTriple() |
| 112 | + |
| 113 | + # TODO other platforms, please implement this function |
| 114 | + if not re.match(".*-.*-linux", triple): |
| 115 | + return True |
| 116 | + |
| 117 | + # Need to do something different for non-Linux/Android targets |
| 118 | + if lldb.remote_platform: |
| 119 | + self.runCmd('platform get-file "/proc/cpuinfo" "cpuinfo"') |
| 120 | + cpuinfo_path = "cpuinfo" |
| 121 | + self.addTearDownHook(lambda: os.unlink("cpuinfo")) |
| 122 | + else: |
| 123 | + cpuinfo_path = "/proc/cpuinfo" |
| 124 | + |
| 125 | + f = open(cpuinfo_path, "r") |
| 126 | + cpuinfo = f.read() |
| 127 | + f.close() |
| 128 | + return " avx " in cpuinfo |
| 129 | + |
| 130 | + @expectedFailureAll(oslist=["windows"]) # no avx for now. |
| 131 | + @skipIf(archs=no_match(["amd64", "i386", "x86_64"])) |
| 132 | + @add_test_categories(["llgs"]) |
| 133 | + def test_qRegisterInfo_contains_avx_registers(self): |
| 134 | + self.build() |
| 135 | + self.prep_debug_monitor_and_inferior() |
| 136 | + self.add_register_info_collection_packets() |
| 137 | + |
| 138 | + # Run the packet stream. |
| 139 | + context = self.expect_gdbremote_sequence() |
| 140 | + self.assertIsNotNone(context) |
| 141 | + |
| 142 | + # Gather register info entries. |
| 143 | + reg_infos = self.parse_register_info_packets(context) |
| 144 | + |
| 145 | + # Collect all generics found. |
| 146 | + register_sets = { |
| 147 | + reg_info["set"]: 1 for reg_info in reg_infos if "set" in reg_info |
| 148 | + } |
| 149 | + self.assertEqual( |
| 150 | + self.targetHasAVX(), "Advanced Vector Extensions" in register_sets |
| 151 | + ) |
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