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[AArch64][SVE] Allow factors other than 2/4 for load+deinterleave3+store patterns for codegen (#162475)
Resolves #159801 and #162068
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+234
-4
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2 files changed

+234
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lines changed

llvm/lib/Target/AArch64/AArch64ISelLowering.cpp

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -18176,8 +18176,8 @@ bool AArch64TargetLowering::lowerInterleavedStore(Instruction *Store,
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bool AArch64TargetLowering::lowerDeinterleaveIntrinsicToLoad(
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Instruction *Load, Value *Mask, IntrinsicInst *DI) const {
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const unsigned Factor = getDeinterleaveIntrinsicFactor(DI->getIntrinsicID());
18179-
if (Factor != 2 && Factor != 4) {
18180-
LLVM_DEBUG(dbgs() << "Matching ld2 and ld4 patterns failed\n");
18179+
if (Factor != 2 && Factor != 3 && Factor != 4) {
18180+
LLVM_DEBUG(dbgs() << "Matching ld2, ld3 and ld4 patterns failed\n");
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return false;
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}
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auto *LI = dyn_cast<LoadInst>(Load);
@@ -18255,8 +18255,8 @@ bool AArch64TargetLowering::lowerInterleaveIntrinsicToStore(
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Instruction *Store, Value *Mask,
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ArrayRef<Value *> InterleavedValues) const {
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unsigned Factor = InterleavedValues.size();
18258-
if (Factor != 2 && Factor != 4) {
18259-
LLVM_DEBUG(dbgs() << "Matching st2 and st4 patterns failed\n");
18258+
if (Factor != 2 && Factor != 3 && Factor != 4) {
18259+
LLVM_DEBUG(dbgs() << "Matching st2, st3 and st4 patterns failed\n");
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return false;
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}
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StoreInst *SI = dyn_cast<StoreInst>(Store);

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