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Merge branch 'x86-lowerFPToIntToFP-extend' of github.com:KavinTheG/llvm-project into x86-lowerFPToIntToFP-extend
2 parents 9f3d404 + fa5b17a commit 609649e

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llvm/lib/Target/X86/X86ISelLowering.cpp

Lines changed: 10 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -19897,7 +19897,7 @@ static SDValue lowerFPToIntToFP(SDValue CastToFP, const SDLoc &DL,
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// See if we have 128-bit vector cast instructions for this type of cast.
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// We need cvttps2dq/cvttpd2dq and cvtdq2ps/cvtdq2pd.
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if (!Subtarget.hasSSE2() || (VT != MVT::f32 && VT != MVT::f64) ||
19900-
(IntVT != MVT::i32 && IntVT != MVT::i64))
19900+
!(IntVT == MVT::i32 || (IntVT == MVT::i64 && Subtarget.hasDQI())))
1990119901
return SDValue();
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1990319903
unsigned SrcSize = SrcVT.getSizeInBits();
@@ -19908,23 +19908,24 @@ static SDValue lowerFPToIntToFP(SDValue CastToFP, const SDLoc &DL,
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bool IsUnsigned = CastToInt.getOpcode() == ISD::FP_TO_UINT;
1990919909

1991019910
if (Subtarget.hasAVX512()) {
19911-
if (Subtarget.hasVLX()) {
19912-
// AVX512VL could handle for FP_TO_UINT/UINT_TO_FP (f64/32 <-> i32) AVX512F as well but Width = 512
19911+
if (Subtarget.hasVLX()) {
19912+
// AVX512VL could handle for FP_TO_UINT/UINT_TO_FP (f64/32 <-> i32)
19913+
// AVX512F as well but Width = 512
1991319914
if (IntVT == MVT::i32) {
19914-
ToIntOpcode = IsUnsigned ? X86ISD::CVTTP2UI : X86ISD::CVTTP2SI;
19915-
ToFPOpcode = IsUnsigned ? X86ISD::CVTUI2P : X86ISD::CVTSI2P;
19915+
ToIntOpcode = IsUnsigned ? X86ISD::CVTTP2UI : X86ISD::CVTTP2SI;
19916+
ToFPOpcode = IsUnsigned ? X86ISD::CVTUI2P : X86ISD::CVTSI2P;
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} else {
1991719918
ToIntOpcode = CastToInt.getOpcode();
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ToFPOpcode = IsUnsigned ? ISD::UINT_TO_FP : ISD::SINT_TO_FP;
19919-
}
19920-
} else if (Subtarget.hasDQI() && IntVT == MVT::i64) {
19920+
}
19921+
} else if (IntVT == MVT::i64) {
1992119922
// AVX512DQ + AVX512VL could handle f64/32 <-> i64 SINT & UINT
19922-
ToIntOpcode = CastToInt.getOpcode();
19923+
ToIntOpcode = CastToInt.getOpcode();
1992319924
ToFPOpcode = IsUnsigned ? ISD::UINT_TO_FP : ISD::SINT_TO_FP;
1992419925
} else {
1992519926
// AVX512F
1992619927
Width = 512;
19927-
ToIntOpcode = CastToInt.getOpcode();
19928+
ToIntOpcode = CastToInt.getOpcode();
1992819929
ToFPOpcode = IsUnsigned ? ISD::UINT_TO_FP : ISD::SINT_TO_FP;
1992919930
}
1993019931
} else {
@@ -19941,7 +19942,6 @@ static SDValue lowerFPToIntToFP(SDValue CastToFP, const SDLoc &DL,
1994119942
MVT VecIntVT = MVT::getVectorVT(IntVT, Width / IntSize);
1994219943
MVT VecVT = MVT::getVectorVT(VT, Width / VTSize);
1994319944

19944-
1994519945
// sint_to_fp (fp_to_sint X) --> extelt (sint_to_fp (fp_to_sint (s2v X))), 0
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//
1994719947
// We are not defining the high elements (for example, zero them) because

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