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[RISCV] Fix some isel patterns that used a type where we normally put a regclass. NFC
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2 files changed

+5
-4
lines changed

2 files changed

+5
-4
lines changed

llvm/lib/Target/RISCV/RISCVGISel.td

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -264,7 +264,7 @@ def : Pat<(i32 (xor GPR:$rs1, (not GPR:$rs2))), (XNOR GPR:$rs1, GPR:$rs2)>;
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} // Predicates = [HasStdExtZbbOrZbkb, IsRV64]
265265

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let Predicates = [HasStdExtZba, IsRV64] in {
267-
def : Pat<(shl (i64 (zext i32:$rs1)), uimm5:$shamt),
267+
def : Pat<(shl (i64 (zext GPR:$rs1)), uimm5:$shamt),
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(SLLI_UW GPR:$rs1, uimm5:$shamt)>;
269269

270270
def : Pat<(i64 (add_like_non_imm12 (zext GPR:$rs1), GPR:$rs2)),

llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td

Lines changed: 4 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -25,6 +25,7 @@ def rvv_vnot : PatFrag<(ops node:$in),
2525
(xor node:$in, (riscv_vmset_vl (XLenVT srcvalue)))>;
2626

2727
multiclass VPatUSLoadStoreSDNode<ValueType type,
28+
RegisterClass regclass,
2829
int log2sew,
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LMULInfo vlmul,
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OutPatFrag avl,
@@ -37,7 +38,7 @@ multiclass VPatUSLoadStoreSDNode<ValueType type,
3738
(load_instr (type (IMPLICIT_DEF)), GPR:$rs1, avl,
3839
log2sew, TA_MA)>;
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// Store
40-
def : Pat<(store type:$rs2, (XLenVT GPR:$rs1)),
41+
def : Pat<(store (type regclass:$rs2), (XLenVT GPR:$rs1)),
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(store_instr reg_class:$rs2, GPR:$rs1, avl, log2sew)>;
4243
}
4344

@@ -49,7 +50,7 @@ multiclass VPatUSLoadStoreMaskSDNode<MTypeInfo m> {
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(load_instr (m.Mask (IMPLICIT_DEF)), GPR:$rs1, m.AVL,
5051
m.Log2SEW, TA_MA)>;
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// Store
52-
def : Pat<(store m.Mask:$rs2, GPR:$rs1),
53+
def : Pat<(store (m.Mask VR:$rs2), GPR:$rs1),
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(store_instr VR:$rs2, GPR:$rs1, m.AVL, m.Log2SEW)>;
5455
}
5556

@@ -884,7 +885,7 @@ multiclass VPatAVGADD_VV_VX_RM<SDNode vop, int vxrm, string suffix = ""> {
884885
foreach vti = AllVectors in
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let Predicates = !if(!eq(vti.Scalar, f16), [HasVInstructionsF16Minimal],
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GetVTypePredicates<vti>.Predicates) in
887-
defm : VPatUSLoadStoreSDNode<vti.Vector, vti.Log2SEW, vti.LMul,
888+
defm : VPatUSLoadStoreSDNode<vti.Vector, vti.RegClass, vti.Log2SEW, vti.LMul,
888889
vti.AVL, vti.RegClass>;
889890
foreach mti = AllMasks in
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let Predicates = [HasVInstructions] in

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