@@ -31527,38 +31527,6 @@ bool AArch64TargetLowering::SimplifyDemandedBitsForTargetNode(
3152731527 Op, OriginalDemandedBits, OriginalDemandedElts, Known, TLO, Depth);
3152831528}
3152931529
31530- bool AArch64TargetLowering::SimplifyDemandedVectorEltsForTargetNode(
31531- SDValue Op,
31532- const APInt &DemandedElts,
31533- APInt &KnownUndef,
31534- APInt &KnownZero,
31535- TargetLoweringOpt &TLO,
31536- unsigned Depth) const {
31537-
31538- SDNode *N = Op.getNode();
31539- unsigned Opc = N->getOpcode();
31540-
31541- if (Opc != AArch64ISD::DUPLANE8 &&
31542- Opc != AArch64ISD::DUPLANE16 &&
31543- Opc != AArch64ISD::DUPLANE32 &&
31544- Opc != AArch64ISD::DUPLANE64)
31545- return false;
31546-
31547- if (DemandedElts.popcount() != 1)
31548- return false;
31549-
31550- SDValue Src = N->getOperand(0);
31551- SDValue Lane = N->getOperand(1);
31552-
31553- SDLoc DL(N);
31554- SelectionDAG &DAG = TLO.DAG;
31555-
31556- SDValue Extracted = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, Src.getValueType().getScalarType(), Src, Lane);
31557- SDValue Splat = DAG.getSplatVector(Op.getValueType(), DL, Extracted);
31558-
31559- return TLO.CombineTo(Op, Splat);
31560- }
31561-
3156231530bool AArch64TargetLowering::canCreateUndefOrPoisonForTargetNode(
3156331531 SDValue Op, const APInt &DemandedElts, const SelectionDAG &DAG,
3156431532 bool PoisonOnly, bool ConsiderFlags, unsigned Depth) const {
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