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DhruvSrivastavaXDhruvSrivastavaX
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Merge remote-tracking branch 'upstream/main' into gh-101657 
2 parents 0d959cc + 65ad02b commit 6259bb3

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60 files changed

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‎clang/lib/AST/ByteCode/Compiler.cpp

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -4033,6 +4033,9 @@ template <class Emitter> bool Compiler<Emitter>::visitBool(const Expr *E) {
40334033
template <class Emitter>
40344034
bool Compiler<Emitter>::visitZeroInitializer(PrimType T, QualType QT,
40354035
const Expr *E) {
4036+
if (const auto *AT = QT->getAs<AtomicType>())
4037+
QT = AT->getValueType();
4038+
40364039
switch (T) {
40374040
case PT_Bool:
40384041
return this->emitZeroBool(E);

‎clang/lib/AST/ByteCode/InterpBuiltin.cpp

Lines changed: 14 additions & 26 deletions
Original file line numberDiff line numberDiff line change
@@ -212,13 +212,11 @@ static bool interp__builtin_strcmp(InterpState &S, CodePtr OpPC,
212212
const Pointer &A = getParam<Pointer>(Frame, 0);
213213
const Pointer &B = getParam<Pointer>(Frame, 1);
214214

215-
if (ID == Builtin::BIstrcmp || ID == Builtin::BIstrncmp ||
216-
ID == Builtin::BIwcscmp || ID == Builtin::BIwcsncmp)
215+
if (ID == Builtin::BIstrcmp || ID == Builtin::BIstrncmp)
217216
diagnoseNonConstexprBuiltin(S, OpPC, ID);
218217

219218
uint64_t Limit = ~static_cast<uint64_t>(0);
220-
if (ID == Builtin::BIstrncmp || ID == Builtin::BI__builtin_strncmp ||
221-
ID == Builtin::BIwcsncmp || ID == Builtin::BI__builtin_wcsncmp)
219+
if (ID == Builtin::BIstrncmp || ID == Builtin::BI__builtin_strncmp)
222220
Limit = peekToAPSInt(S.Stk, *S.getContext().classify(Call->getArg(2)))
223221
.getZExtValue();
224222

@@ -233,9 +231,6 @@ static bool interp__builtin_strcmp(InterpState &S, CodePtr OpPC,
233231
if (A.isDummy() || B.isDummy())
234232
return false;
235233

236-
bool IsWide = ID == Builtin::BIwcscmp || ID == Builtin::BIwcsncmp ||
237-
ID == Builtin::BI__builtin_wcscmp ||
238-
ID == Builtin::BI__builtin_wcsncmp;
239234
assert(A.getFieldDesc()->isPrimitiveArray());
240235
assert(B.getFieldDesc()->isPrimitiveArray());
241236

@@ -253,21 +248,6 @@ static bool interp__builtin_strcmp(InterpState &S, CodePtr OpPC,
253248
!CheckRange(S, OpPC, PB, AK_Read)) {
254249
return false;
255250
}
256-
257-
if (IsWide)
258-
INT_TYPE_SWITCH(
259-
*S.getContext().classify(S.getASTContext().getWCharType()), {
260-
T A = PA.deref<T>();
261-
T B = PB.deref<T>();
262-
if (A < B) {
263-
pushInteger(S, -1, Call->getType());
264-
return true;
265-
} else if (A > B) {
266-
pushInteger(S, 1, Call->getType());
267-
return true;
268-
}
269-
});
270-
271251
uint8_t CA = PA.deref<uint8_t>();
272252
uint8_t CB = PB.deref<uint8_t>();
273253

@@ -2140,10 +2120,6 @@ bool InterpretBuiltin(InterpState &S, CodePtr OpPC, const Function *F,
21402120
case Builtin::BIstrcmp:
21412121
case Builtin::BI__builtin_strncmp:
21422122
case Builtin::BIstrncmp:
2143-
case Builtin::BI__builtin_wcsncmp:
2144-
case Builtin::BIwcsncmp:
2145-
case Builtin::BI__builtin_wcscmp:
2146-
case Builtin::BIwcscmp:
21472123
if (!interp__builtin_strcmp(S, OpPC, Frame, F, Call))
21482124
return false;
21492125
break;
@@ -2793,6 +2769,18 @@ static bool copyComposite(InterpState &S, CodePtr OpPC, const Pointer &Src,
27932769
return true;
27942770
}
27952771

2772+
if (DestDesc->isCompositeArray()) {
2773+
assert(SrcDesc->isCompositeArray());
2774+
assert(SrcDesc->getNumElems() == DestDesc->getNumElems());
2775+
for (unsigned I = 0, N = DestDesc->getNumElems(); I != N; ++I) {
2776+
const Pointer &SrcElem = Src.atIndex(I).narrow();
2777+
Pointer DestElem = Dest.atIndex(I).narrow();
2778+
if (!copyComposite(S, OpPC, SrcElem, DestElem, Activate))
2779+
return false;
2780+
}
2781+
return true;
2782+
}
2783+
27962784
if (DestDesc->isRecord())
27972785
return copyRecord(S, OpPC, Src, Dest, Activate);
27982786
return Invalid(S, OpPC);

‎clang/test/AST/ByteCode/builtin-functions.cpp

Lines changed: 0 additions & 46 deletions
Original file line numberDiff line numberDiff line change
@@ -28,8 +28,6 @@ extern "C" {
2828
extern char *strchr(const char *s, int c);
2929
extern wchar_t *wmemchr(const wchar_t *s, wchar_t c, size_t n);
3030
extern wchar_t *wcschr(const wchar_t *s, wchar_t c);
31-
extern int wcscmp(const wchar_t *s1, const wchar_t *s2);
32-
extern int wcsncmp(const wchar_t *s1, const wchar_t *s2, size_t n);
3331
}
3432

3533
namespace strcmp {
@@ -74,50 +72,6 @@ namespace strcmp {
7472
static_assert(__builtin_strncmp("abab\0banana", "abab\0canada", 100) == 0);
7573
}
7674

77-
namespace WcsCmp {
78-
constexpr wchar_t kFoobar[6] = {L'f',L'o',L'o',L'b',L'a',L'r'};
79-
constexpr wchar_t kFoobazfoobar[12] = {L'f',L'o',L'o',L'b',L'a',L'z',L'f',L'o',L'o',L'b',L'a',L'r'};
80-
81-
static_assert(__builtin_wcscmp(L"abab", L"abab") == 0);
82-
static_assert(__builtin_wcscmp(L"abab", L"abba") == -1);
83-
static_assert(__builtin_wcscmp(L"abab", L"abaa") == 1);
84-
static_assert(__builtin_wcscmp(L"ababa", L"abab") == 1);
85-
static_assert(__builtin_wcscmp(L"abab", L"ababa") == -1);
86-
static_assert(__builtin_wcscmp(L"abab\0banana", L"abab") == 0);
87-
static_assert(__builtin_wcscmp(L"abab", L"abab\0banana") == 0);
88-
static_assert(__builtin_wcscmp(L"abab\0banana", L"abab\0canada") == 0);
89-
#if __WCHAR_WIDTH__ == 32
90-
static_assert(__builtin_wcscmp(L"a\x83838383", L"a") == (wchar_t)-1U >> 31);
91-
#endif
92-
static_assert(__builtin_wcscmp(0, L"abab") == 0); // both-error {{not an integral constant}} \
93-
// both-note {{dereferenced null}}
94-
static_assert(__builtin_wcscmp(L"abab", 0) == 0); // both-error {{not an integral constant}} \
95-
// both-note {{dereferenced null}}
96-
97-
static_assert(__builtin_wcscmp(kFoobar, kFoobazfoobar) == -1);
98-
static_assert(__builtin_wcscmp(kFoobar, kFoobazfoobar + 6) == 0); // both-error {{not an integral constant}} \
99-
// both-note {{dereferenced one-past-the-end}}
100-
101-
static_assert(__builtin_wcsncmp(L"abaa", L"abba", 5) == -1);
102-
static_assert(__builtin_wcsncmp(L"abaa", L"abba", 4) == -1);
103-
static_assert(__builtin_wcsncmp(L"abaa", L"abba", 3) == -1);
104-
static_assert(__builtin_wcsncmp(L"abaa", L"abba", 2) == 0);
105-
static_assert(__builtin_wcsncmp(L"abaa", L"abba", 1) == 0);
106-
static_assert(__builtin_wcsncmp(L"abaa", L"abba", 0) == 0);
107-
static_assert(__builtin_wcsncmp(0, 0, 0) == 0);
108-
static_assert(__builtin_wcsncmp(L"abab\0banana", L"abab\0canada", 100) == 0);
109-
#if __WCHAR_WIDTH__ == 32
110-
static_assert(__builtin_wcsncmp(L"a\x83838383", L"aa", 2) ==
111-
(wchar_t)-1U >> 31);
112-
#endif
113-
114-
static_assert(__builtin_wcsncmp(kFoobar, kFoobazfoobar, 6) == -1);
115-
static_assert(__builtin_wcsncmp(kFoobar, kFoobazfoobar, 7) == -1);
116-
static_assert(__builtin_wcsncmp(kFoobar, kFoobazfoobar + 6, 6) == 0);
117-
static_assert(__builtin_wcsncmp(kFoobar, kFoobazfoobar + 6, 7) == 0); // both-error {{not an integral constant}} \
118-
// both-note {{dereferenced one-past-the-end}}
119-
}
120-
12175
/// Copied from constant-expression-cxx11.cpp
12276
namespace strlen {
12377
constexpr const char *a = "foo\0quux";

‎clang/test/AST/ByteCode/c.c

Lines changed: 10 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -203,6 +203,16 @@ const struct StrA sc = *sb;
203203
_Static_assert(sc.a == 12, ""); // pedantic-ref-warning {{GNU extension}} \
204204
// pedantic-expected-warning {{GNU extension}}
205205

206+
struct ComplexS {
207+
int a;
208+
float b;
209+
struct StrA sa[2];
210+
};
211+
const struct ComplexS CS = {12, 23.0f, {{1}, {2}}};
212+
const struct ComplexS CS2 = CS;
213+
_Static_assert(CS2.sa[0].a == 1, ""); // pedantic-ref-warning {{GNU extension}} \
214+
// pedantic-expected-warning {{GNU extension}}
215+
206216
_Static_assert(((void*)0 + 1) != (void*)0, ""); // pedantic-expected-warning {{arithmetic on a pointer to void is a GNU extension}} \
207217
// pedantic-expected-warning {{not an integer constant expression}} \
208218
// pedantic-expected-note {{cannot perform pointer arithmetic on null pointer}} \

‎clang/test/AST/ByteCode/floats.cpp

Lines changed: 4 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -175,7 +175,10 @@ namespace ZeroInit {
175175
static_assert(a.f == 0.0f, "");
176176

177177
constexpr A<double> b{12};
178-
static_assert(a.f == 0.0, "");
178+
static_assert(b.f == 0.0, "");
179+
180+
constexpr A<_Atomic(float)> c{12};
181+
static_assert(c.f == 0.0, "");
179182
};
180183

181184
namespace LongDouble {

‎clang/test/Driver/aarch64-nvidia-olympus.c

Lines changed: 13 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,13 @@
1+
// RUN: %clang --target=aarch64 -mcpu=olympus -### -c %s 2>&1 | FileCheck -check-prefix=olympus %s
2+
// RUN: %clang --target=aarch64 -mlittle-endian -mcpu=olympus -### -c %s 2>&1 | FileCheck -check-prefix=olympus %s
3+
// RUN: %clang --target=aarch64 -mtune=olympus -### -c %s 2>&1 | FileCheck -check-prefix=olympus-TUNE %s
4+
// RUN: %clang --target=aarch64 -mlittle-endian -mtune=olympus -### -c %s 2>&1 | FileCheck -check-prefix=olympus-TUNE %s
5+
// olympus: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-cpu" "olympus"
6+
// olympus-TUNE: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-cpu" "generic"
7+
8+
// RUN: %clang --target=arm64 -mcpu=olympus -### -c %s 2>&1 | FileCheck -check-prefix=ARM64-olympus %s
9+
// RUN: %clang --target=arm64 -mlittle-endian -mcpu=olympus -### -c %s 2>&1 | FileCheck -check-prefix=ARM64-olympus %s
10+
// RUN: %clang --target=arm64 -mtune=olympus -### -c %s 2>&1 | FileCheck -check-prefix=ARM64-olympus-TUNE %s
11+
// RUN: %clang --target=arm64 -mlittle-endian -mtune=olympus -### -c %s 2>&1 | FileCheck -check-prefix=ARM64-olympus-TUNE %s
12+
// ARM64-olympus: "-cc1"{{.*}} "-triple" "arm64{{.*}}" "-target-cpu" "olympus"
13+
// ARM64-olympus-TUNE: "-cc1"{{.*}} "-triple" "arm64{{.*}}" "-target-cpu" "generic"

‎clang/test/Driver/print-enabled-extensions/aarch64-olympus.c

Lines changed: 81 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,81 @@
1+
// REQUIRES: aarch64-registered-target
2+
// RUN: %clang --target=aarch64 --print-enabled-extensions -mcpu=olympus | FileCheck --strict-whitespace --implicit-check-not=FEAT_ %s
3+
4+
// CHECK: Extensions enabled for the given AArch64 target
5+
// CHECK-EMPTY:
6+
// CHECK-NEXT: Architecture Feature(s) Description
7+
// CHECK-NEXT: FEAT_AES, FEAT_PMULL Enable AES support
8+
// CHECK-NEXT: FEAT_AMUv1 Enable Armv8.4-A Activity Monitors extension
9+
// CHECK-NEXT: FEAT_AMUv1p1 Enable Armv8.6-A Activity Monitors Virtualization support
10+
// CHECK-NEXT: FEAT_AdvSIMD Enable Advanced SIMD instructions
11+
// CHECK-NEXT: FEAT_BF16 Enable BFloat16 Extension
12+
// CHECK-NEXT: FEAT_BRBE Enable Branch Record Buffer Extension
13+
// CHECK-NEXT: FEAT_BTI Enable Branch Target Identification
14+
// CHECK-NEXT: FEAT_CCIDX Enable Armv8.3-A Extend of the CCSIDR number of sets
15+
// CHECK-NEXT: FEAT_CHK Enable Armv8.0-A Check Feature Status Extension
16+
// CHECK-NEXT: FEAT_CRC32 Enable Armv8.0-A CRC-32 checksum instructions
17+
// CHECK-NEXT: FEAT_CSV2_2 Enable architectural speculation restriction
18+
// CHECK-NEXT: FEAT_DIT Enable Armv8.4-A Data Independent Timing instructions
19+
// CHECK-NEXT: FEAT_DPB Enable Armv8.2-A data Cache Clean to Point of Persistence
20+
// CHECK-NEXT: FEAT_DPB2 Enable Armv8.5-A Cache Clean to Point of Deep Persistence
21+
// CHECK-NEXT: FEAT_DotProd Enable dot product support
22+
// CHECK-NEXT: FEAT_ECV Enable enhanced counter virtualization extension
23+
// CHECK-NEXT: FEAT_ETE Enable Embedded Trace Extension
24+
// CHECK-NEXT: FEAT_FAMINMAX Enable FAMIN and FAMAX instructions
25+
// CHECK-NEXT: FEAT_FCMA Enable Armv8.3-A Floating-point complex number support
26+
// CHECK-NEXT: FEAT_FGT Enable fine grained virtualization traps extension
27+
// CHECK-NEXT: FEAT_FHM Enable FP16 FML instructions
28+
// CHECK-NEXT: FEAT_FP Enable Armv8.0-A Floating Point Extensions
29+
// CHECK-NEXT: FEAT_FP16 Enable half-precision floating-point data processing
30+
// CHECK-NEXT: FEAT_FP8 Enable FP8 instructions
31+
// CHECK-NEXT: FEAT_FP8DOT2 Enable FP8 2-way dot instructions
32+
// CHECK-NEXT: FEAT_FP8DOT4 Enable FP8 4-way dot instructions
33+
// CHECK-NEXT: FEAT_FP8FMA Enable Armv9.5-A FP8 multiply-add instructions
34+
// CHECK-NEXT: FEAT_FPAC Enable Armv8.3-A Pointer Authentication Faulting enhancement
35+
// CHECK-NEXT: FEAT_FRINTTS Enable FRInt[32|64][Z|X] instructions that round a floating-point number to an integer (in FP format) forcing it to fit into a 32- or 64-bit int
36+
// CHECK-NEXT: FEAT_FlagM Enable Armv8.4-A Flag Manipulation instructions
37+
// CHECK-NEXT: FEAT_FlagM2 Enable alternative NZCV format for floating point comparisons
38+
// CHECK-NEXT: FEAT_HCX Enable Armv8.7-A HCRX_EL2 system register
39+
// CHECK-NEXT: FEAT_I8MM Enable Matrix Multiply Int8 Extension
40+
// CHECK-NEXT: FEAT_JSCVT Enable Armv8.3-A JavaScript FP conversion instructions
41+
// CHECK-NEXT: FEAT_LOR Enable Armv8.1-A Limited Ordering Regions extension
42+
// CHECK-NEXT: FEAT_LRCPC Enable support for RCPC extension
43+
// CHECK-NEXT: FEAT_LRCPC2 Enable Armv8.4-A RCPC instructions with Immediate Offsets
44+
// CHECK-NEXT: FEAT_LS64, FEAT_LS64_V, FEAT_LS64_ACCDATA Enable Armv8.7-A LD64B/ST64B Accelerator Extension
45+
// CHECK-NEXT: FEAT_LSE Enable Armv8.1-A Large System Extension (LSE) atomic instructions
46+
// CHECK-NEXT: FEAT_LSE2 Enable Armv8.4-A Large System Extension 2 (LSE2) atomicity rules
47+
// CHECK-NEXT: FEAT_LUT Enable Lookup Table instructions
48+
// CHECK-NEXT: FEAT_MEC Enable Memory Encryption Contexts Extension
49+
// CHECK-NEXT: FEAT_MPAM Enable Armv8.4-A Memory system Partitioning and Monitoring extension
50+
// CHECK-NEXT: FEAT_MTE, FEAT_MTE2 Enable Memory Tagging Extension
51+
// CHECK-NEXT: FEAT_NV, FEAT_NV2 Enable Armv8.4-A Nested Virtualization Enchancement
52+
// CHECK-NEXT: FEAT_PAN Enable Armv8.1-A Privileged Access-Never extension
53+
// CHECK-NEXT: FEAT_PAN2 Enable Armv8.2-A PAN s1e1R and s1e1W Variants
54+
// CHECK-NEXT: FEAT_PAuth Enable Armv8.3-A Pointer Authentication extension
55+
// CHECK-NEXT: FEAT_PMUv3 Enable Armv8.0-A PMUv3 Performance Monitors extension
56+
// CHECK-NEXT: FEAT_RAS, FEAT_RASv1p1 Enable Armv8.0-A Reliability, Availability and Serviceability Extensions
57+
// CHECK-NEXT: FEAT_RDM Enable Armv8.1-A Rounding Double Multiply Add/Subtract instructions
58+
// CHECK-NEXT: FEAT_RME Enable Realm Management Extension
59+
// CHECK-NEXT: FEAT_RNG Enable Random Number generation instructions
60+
// CHECK-NEXT: FEAT_SB Enable Armv8.5-A Speculation Barrier
61+
// CHECK-NEXT: FEAT_SEL2 Enable Armv8.4-A Secure Exception Level 2 extension
62+
// CHECK-NEXT: FEAT_SHA1, FEAT_SHA256 Enable SHA1 and SHA256 support
63+
// CHECK-NEXT: FEAT_SHA3, FEAT_SHA512 Enable SHA512 and SHA3 support
64+
// CHECK-NEXT: FEAT_SM4, FEAT_SM3 Enable SM3 and SM4 support
65+
// CHECK-NEXT: FEAT_SPE Enable Statistical Profiling extension
66+
// CHECK-NEXT: FEAT_SPECRES Enable Armv8.5-A execution and data prediction invalidation instructions
67+
// CHECK-NEXT: FEAT_SPEv1p2 Enable extra register in the Statistical Profiling Extension
68+
// CHECK-NEXT: FEAT_SSBS, FEAT_SSBS2 Enable Speculative Store Bypass Safe bit
69+
// CHECK-NEXT: FEAT_SVE Enable Scalable Vector Extension (SVE) instructions
70+
// CHECK-NEXT: FEAT_SVE2 Enable Scalable Vector Extension 2 (SVE2) instructions
71+
// CHECK-NEXT: FEAT_SVE_AES, FEAT_SVE_PMULL128 Enable SVE AES and quadword SVE polynomial multiply instructions
72+
// CHECK-NEXT: FEAT_SVE_BitPerm Enable bit permutation SVE2 instructions
73+
// CHECK-NEXT: FEAT_SVE_SHA3 Enable SHA3 SVE2 instructions
74+
// CHECK-NEXT: FEAT_SVE_SM4 Enable SM4 SVE2 instructions
75+
// CHECK-NEXT: FEAT_TLBIOS, FEAT_TLBIRANGE Enable Armv8.4-A TLB Range and Maintenance instructions
76+
// CHECK-NEXT: FEAT_TRBE Enable Trace Buffer Extension
77+
// CHECK-NEXT: FEAT_TRF Enable Armv8.4-A Trace extension
78+
// CHECK-NEXT: FEAT_UAO Enable Armv8.2-A UAO PState
79+
// CHECK-NEXT: FEAT_VHE Enable Armv8.1-A Virtual Host extension
80+
// CHECK-NEXT: FEAT_WFxT Enable Armv8.7-A WFET and WFIT instruction
81+
// CHECK-NEXT: FEAT_XS Enable Armv8.7-A limited-TLB-maintenance instruction

‎clang/test/Misc/target-invalid-cpu-note/aarch64.c

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -86,6 +86,7 @@
8686
// CHECK-SAME: {{^}}, neoverse-v2
8787
// CHECK-SAME: {{^}}, neoverse-v3
8888
// CHECK-SAME: {{^}}, neoverse-v3ae
89+
// CHECK-SAME: {{^}}, olympus
8990
// CHECK-SAME: {{^}}, oryon-1
9091
// CHECK-SAME: {{^}}, saphira
9192
// CHECK-SAME: {{^}}, thunderx

‎libclc/clc/include/clc/math/clc_acos.h

Lines changed: 20 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,20 @@
1+
//===----------------------------------------------------------------------===//
2+
//
3+
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4+
// See https://llvm.org/LICENSE.txt for license information.
5+
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6+
//
7+
//===----------------------------------------------------------------------===//
8+
9+
#ifndef __CLC_MATH_CLC_ACOS_H__
10+
#define __CLC_MATH_CLC_ACOS_H__
11+
12+
#define __CLC_BODY <clc/math/unary_decl.inc>
13+
#define __CLC_FUNCTION __clc_acos
14+
15+
#include <clc/math/gentype.inc>
16+
17+
#undef __CLC_BODY
18+
#undef __CLC_FUNCTION
19+
20+
#endif // __CLC_MATH_CLC_ACOS_H__

‎libclc/clc/include/clc/math/clc_asin.h

Lines changed: 20 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,20 @@
1+
//===----------------------------------------------------------------------===//
2+
//
3+
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4+
// See https://llvm.org/LICENSE.txt for license information.
5+
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6+
//
7+
//===----------------------------------------------------------------------===//
8+
9+
#ifndef __CLC_MATH_CLC_ASIN_H__
10+
#define __CLC_MATH_CLC_ASIN_H__
11+
12+
#define __CLC_BODY <clc/math/unary_decl.inc>
13+
#define __CLC_FUNCTION __clc_asin
14+
15+
#include <clc/math/gentype.inc>
16+
17+
#undef __CLC_BODY
18+
#undef __CLC_FUNCTION
19+
20+
#endif // __CLC_MATH_CLC_ASIN_H__

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