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Handle non-register operands correctly
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2 files changed

+41
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llvm/lib/Target/AArch64/AArch64ISelLowering.cpp

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@@ -3128,6 +3128,9 @@ stripAndAccumulateOffset(const MachineRegisterInfo &MRI, Register Reg,
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// If this is neither a copy, nor inc/dec instruction, we are done.
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if (Opcode != AArch64::ADDXri && Opcode != AArch64::SUBXri)
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return DefMI;
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// Handle cases like `ADDXri %stack.0.local_var, 0, 0`.
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if (!DefMI->getOperand(1).isReg())
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return DefMI;
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// Inc/dec with shifted immediates are not handled.
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if (DefMI->getOperand(3).getImm() != 0)
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return DefMI;

llvm/test/CodeGen/AArch64/ptrauth-isel.mir

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@@ -44,6 +44,12 @@
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entry:
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ret i64 0
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}
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define i64 @blended_stack_address(i64 %a) {
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entry:
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%local_var = alloca ptr, align 8
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ret i64 0
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}
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...
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---
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name: movk_correct_blend
@@ -203,3 +209,35 @@ body: |
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$x0 = COPY %3
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RET_ReallyLR implicit $x0
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...
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# Make sure non-register operands are handled correctly.
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---
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name: blended_stack_address
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tracksRegLiveness: true
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stack:
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- { id: 0, name: local_var, type: default, offset: 0, size: 8, alignment: 8,
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stack-id: default, callee-saved-register: '', callee-saved-restored: true,
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debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
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body: |
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bb.0.entry:
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liveins: $x0
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; CHECK-LABEL: name: blended_stack_address
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; CHECK: liveins: $x0
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr64 = COPY $x0
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; CHECK-NEXT: LIFETIME_START %stack.0.local_var
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; CHECK-NEXT: [[ADDXri:%[0-9]+]]:gpr64common_and_gpr64noip = ADDXri %stack.0.local_var, 0, 0
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; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr64noip = COPY [[ADDXri]]
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; CHECK-NEXT: [[PAC:%[0-9]+]]:gpr64 = PAC [[COPY]], 2, 0, killed [[COPY1]], implicit-def dead $x16, implicit-def dead $x17
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; CHECK-NEXT: LIFETIME_END %stack.0.local_var
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; CHECK-NEXT: $x0 = COPY [[PAC]]
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; CHECK-NEXT: RET_ReallyLR implicit $x0
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%0:gpr64 = COPY $x0
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LIFETIME_START %stack.0.local_var
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%1:gpr64common_and_gpr64noip = ADDXri %stack.0.local_var, 0, 0
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%2:gpr64 = PAC %0, 2, 0, killed %1, implicit-def dead $x16, implicit-def dead $x17
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LIFETIME_END %stack.0.local_var
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$x0 = COPY %2
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RET_ReallyLR implicit $x0
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...

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