@@ -607,6 +607,42 @@ define <vscale x 32 x bfloat> @insert_nxv32bf16_undef_nxv1bf16_26(<vscale x 1 x
607607 ret <vscale x 32 x bfloat> %v
608608}
609609
610+ define <vscale x 8 x i32 > @insert_splat_to_undef () {
611+ ; CHECK-LABEL: insert_splat_to_undef:
612+ ; CHECK: # %bb.0:
613+ ; CHECK-NEXT: vsetvli a0, zero, e32, m4, ta, ma
614+ ; CHECK-NEXT: vmv.v.i v8, 1
615+ ; CHECK-NEXT: ret
616+ %v = call <vscale x 8 x i32 > @llvm.vector.insert.nxv4i32.nxv8i32 (<vscale x 8 x i32 > poison, <vscale x 4 x i32 > splat (i32 1 ), i64 0 )
617+ ret <vscale x 8 x i32 > %v
618+ }
619+
620+ define <vscale x 8 x i32 > @insert_splat_to_splat () {
621+ ; CHECK-LABEL: insert_splat_to_splat:
622+ ; CHECK: # %bb.0:
623+ ; CHECK-NEXT: vsetvli a0, zero, e32, m2, ta, ma
624+ ; CHECK-NEXT: vmv.v.i v12, 1
625+ ; CHECK-NEXT: vsetvli a0, zero, e32, m4, ta, ma
626+ ; CHECK-NEXT: vmv.v.i v8, 1
627+ ; CHECK-NEXT: vmv2r.v v8, v12
628+ ; CHECK-NEXT: ret
629+ %v = call <vscale x 8 x i32 > @llvm.vector.insert.nxv4i32.nxv8i32 (<vscale x 8 x i32 > splat (i32 1 ), <vscale x 4 x i32 > splat (i32 1 ), i64 0 )
630+ ret <vscale x 8 x i32 > %v
631+ }
632+
633+ define <vscale x 8 x i32 > @insert_splat_to_splat2 () {
634+ ; CHECK-LABEL: insert_splat_to_splat2:
635+ ; CHECK: # %bb.0:
636+ ; CHECK-NEXT: vsetvli a0, zero, e32, m2, ta, ma
637+ ; CHECK-NEXT: vmv.v.i v12, 1
638+ ; CHECK-NEXT: vsetvli a0, zero, e32, m4, ta, ma
639+ ; CHECK-NEXT: vmv.v.i v8, 0
640+ ; CHECK-NEXT: vmv2r.v v8, v12
641+ ; CHECK-NEXT: ret
642+ %v = call <vscale x 8 x i32 > @llvm.vector.insert.nxv4i32.nxv8i32 (<vscale x 8 x i32 > splat (i32 0 ), <vscale x 4 x i32 > splat (i32 1 ), i64 0 )
643+ ret <vscale x 8 x i32 > %v
644+ }
645+
610646attributes #0 = { vscale_range(2 ,1024 ) }
611647
612648declare <vscale x 4 x i1 > @llvm.vector.insert.nxv1i1.nxv4i1 (<vscale x 4 x i1 >, <vscale x 1 x i1 >, i64 )
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