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arsenmarsenm
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Regenerate tests
1 parent 5fe4d5e commit 63985cd

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-31
lines changed

3 files changed

+25
-31
lines changed

‎llvm/test/CodeGen/AMDGPU/attributor-flatscratchinit-undefined-behavior2.ll‎

Lines changed: 5 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -166,14 +166,13 @@ define amdgpu_kernel void @with_private_to_flat_addrspacecast_cc_kernel(ptr addr
166166
; GFX942-ARCH-FLAT: ; %bb.0:
167167
; GFX942-ARCH-FLAT-NEXT: s_load_dword s2, s[4:5], 0x0
168168
; GFX942-ARCH-FLAT-NEXT: s_mov_b64 s[0:1], src_private_base
169-
; GFX942-ARCH-FLAT-NEXT: s_mov_b32 s0, 0
170-
; GFX942-ARCH-FLAT-NEXT: v_mov_b32_e32 v2, s0
169+
; GFX942-ARCH-FLAT-NEXT: v_mov_b32_e32 v2, 0
171170
; GFX942-ARCH-FLAT-NEXT: s_waitcnt lgkmcnt(0)
172171
; GFX942-ARCH-FLAT-NEXT: s_cmp_lg_u32 s2, -1
173-
; GFX942-ARCH-FLAT-NEXT: s_cselect_b32 s1, s1, 0
174-
; GFX942-ARCH-FLAT-NEXT: s_cselect_b32 s2, s2, 0
175-
; GFX942-ARCH-FLAT-NEXT: v_mov_b32_e32 v0, s2
176-
; GFX942-ARCH-FLAT-NEXT: v_mov_b32_e32 v1, s1
172+
; GFX942-ARCH-FLAT-NEXT: s_cselect_b32 s0, s1, 0
173+
; GFX942-ARCH-FLAT-NEXT: s_cselect_b32 s1, s2, 0
174+
; GFX942-ARCH-FLAT-NEXT: v_mov_b32_e32 v0, s1
175+
; GFX942-ARCH-FLAT-NEXT: v_mov_b32_e32 v1, s0
177176
; GFX942-ARCH-FLAT-NEXT: flat_store_dword v[0:1], v2 sc0 sc1
178177
; GFX942-ARCH-FLAT-NEXT: s_waitcnt vmcnt(0)
179178
; GFX942-ARCH-FLAT-NEXT: s_endpgm

‎llvm/test/CodeGen/AMDGPU/flat-scratch.ll‎

Lines changed: 6 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -463,8 +463,7 @@ define amdgpu_kernel void @store_load_sindex_kernel(i32 %idx) {
463463
; GFX942-LABEL: store_load_sindex_kernel:
464464
; GFX942: ; %bb.0: ; %bb
465465
; GFX942-NEXT: s_load_dword s0, s[4:5], 0x24
466-
; GFX942-NEXT: s_mov_b32 s1, 15
467-
; GFX942-NEXT: v_mov_b32_e32 v0, s1
466+
; GFX942-NEXT: v_mov_b32_e32 v0, 15
468467
; GFX942-NEXT: s_waitcnt lgkmcnt(0)
469468
; GFX942-NEXT: s_lshl_b32 s1, s0, 2
470469
; GFX942-NEXT: s_and_b32 s0, s0, 15
@@ -611,9 +610,8 @@ define amdgpu_ps void @store_load_sindex_foo(i32 inreg %idx) {
611610
;
612611
; GFX942-LABEL: store_load_sindex_foo:
613612
; GFX942: ; %bb.0: ; %bb
614-
; GFX942-NEXT: s_mov_b32 s2, 15
615613
; GFX942-NEXT: s_lshl_b32 s1, s0, 2
616-
; GFX942-NEXT: v_mov_b32_e32 v0, s2
614+
; GFX942-NEXT: v_mov_b32_e32 v0, 15
617615
; GFX942-NEXT: s_and_b32 s0, s0, 15
618616
; GFX942-NEXT: scratch_store_dword off, v0, s1 sc0 sc1
619617
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -1590,8 +1588,7 @@ define amdgpu_kernel void @store_load_sindex_small_offset_kernel(i32 %idx) {
15901588
; GFX942-NEXT: s_load_dword s0, s[4:5], 0x24
15911589
; GFX942-NEXT: scratch_load_dword v0, off, off sc0 sc1
15921590
; GFX942-NEXT: s_waitcnt vmcnt(0)
1593-
; GFX942-NEXT: s_mov_b32 s1, 15
1594-
; GFX942-NEXT: v_mov_b32_e32 v0, s1
1591+
; GFX942-NEXT: v_mov_b32_e32 v0, 15
15951592
; GFX942-NEXT: s_waitcnt lgkmcnt(0)
15961593
; GFX942-NEXT: s_lshl_b32 s1, s0, 2
15971594
; GFX942-NEXT: s_and_b32 s0, s0, 15
@@ -1808,10 +1805,9 @@ define amdgpu_ps void @store_load_sindex_small_offset_foo(i32 inreg %idx) {
18081805
; GFX942-NEXT: scratch_load_dword v0, off, off sc0 sc1
18091806
; GFX942-NEXT: s_waitcnt vmcnt(0)
18101807
; GFX942-NEXT: s_lshl_b32 s1, s0, 2
1811-
; GFX942-NEXT: s_mov_b32 s2, 15
18121808
; GFX942-NEXT: s_and_b32 s0, s0, 15
18131809
; GFX942-NEXT: s_addk_i32 s1, 0x100
1814-
; GFX942-NEXT: v_mov_b32_e32 v0, s2
1810+
; GFX942-NEXT: v_mov_b32_e32 v0, 15
18151811
; GFX942-NEXT: s_lshl_b32 s0, s0, 2
18161812
; GFX942-NEXT: scratch_store_dword off, v0, s1 sc0 sc1
18171813
; GFX942-NEXT: s_waitcnt vmcnt(0)
@@ -2888,8 +2884,7 @@ define amdgpu_kernel void @store_load_sindex_large_offset_kernel(i32 %idx) {
28882884
; GFX942-NEXT: s_load_dword s0, s[4:5], 0x24
28892885
; GFX942-NEXT: scratch_load_dword v0, off, off offset:4 sc0 sc1
28902886
; GFX942-NEXT: s_waitcnt vmcnt(0)
2891-
; GFX942-NEXT: s_mov_b32 s1, 15
2892-
; GFX942-NEXT: v_mov_b32_e32 v0, s1
2887+
; GFX942-NEXT: v_mov_b32_e32 v0, 15
28932888
; GFX942-NEXT: s_waitcnt lgkmcnt(0)
28942889
; GFX942-NEXT: s_lshl_b32 s1, s0, 2
28952890
; GFX942-NEXT: s_and_b32 s0, s0, 15
@@ -3106,10 +3101,9 @@ define amdgpu_ps void @store_load_sindex_large_offset_foo(i32 inreg %idx) {
31063101
; GFX942-NEXT: scratch_load_dword v0, off, off offset:4 sc0 sc1
31073102
; GFX942-NEXT: s_waitcnt vmcnt(0)
31083103
; GFX942-NEXT: s_lshl_b32 s1, s0, 2
3109-
; GFX942-NEXT: s_mov_b32 s2, 15
31103104
; GFX942-NEXT: s_and_b32 s0, s0, 15
31113105
; GFX942-NEXT: s_addk_i32 s1, 0x4004
3112-
; GFX942-NEXT: v_mov_b32_e32 v0, s2
3106+
; GFX942-NEXT: v_mov_b32_e32 v0, 15
31133107
; GFX942-NEXT: s_lshl_b32 s0, s0, 2
31143108
; GFX942-NEXT: scratch_store_dword off, v0, s1 sc0 sc1
31153109
; GFX942-NEXT: s_waitcnt vmcnt(0)

‎llvm/test/CodeGen/AMDGPU/undef-handling-crash-in-ra.ll‎

Lines changed: 14 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -19,22 +19,24 @@ define amdgpu_kernel void @foo(ptr addrspace(5) %ptr5, ptr %p0, double %v0, <4 x
1919
; CHECK-NEXT: s_mov_b64 s[4:5], src_private_base
2020
; CHECK-NEXT: s_waitcnt lgkmcnt(0)
2121
; CHECK-NEXT: s_cmp_lg_u32 s68, -1
22-
; CHECK-NEXT: s_cselect_b32 s4, s5, 0
23-
; CHECK-NEXT: s_cselect_b32 s5, s68, 0
22+
; CHECK-NEXT: s_mov_b64 s[38:39], s[6:7]
23+
; CHECK-NEXT: s_mov_b32 s4, 0
24+
; CHECK-NEXT: s_cselect_b32 s5, s5, 0
25+
; CHECK-NEXT: s_cselect_b32 s6, s68, 0
2426
; CHECK-NEXT: s_add_u32 s50, s34, 48
27+
; CHECK-NEXT: v_mov_b32_e32 v47, s5
28+
; CHECK-NEXT: s_mov_b32 s5, s4
2529
; CHECK-NEXT: s_addc_u32 s51, s35, 0
26-
; CHECK-NEXT: v_mov_b32_e32 v46, s5
27-
; CHECK-NEXT: v_mov_b32_e32 v47, s4
30+
; CHECK-NEXT: v_pk_mov_b32 v[62:63], s[4:5], s[4:5] op_sel:[0,1]
2831
; CHECK-NEXT: s_getpc_b64 s[4:5]
2932
; CHECK-NEXT: s_add_u32 s4, s4, G@gotpcrel32@lo+4
3033
; CHECK-NEXT: s_addc_u32 s5, s5, G@gotpcrel32@hi+12
31-
; CHECK-NEXT: v_pk_mov_b32 v[56:57], s[64:65], s[64:65] op_sel:[0,1]
32-
; CHECK-NEXT: s_load_dwordx2 s[64:65], s[4:5], 0x0
33-
; CHECK-NEXT: s_mov_b32 s54, 0
34-
; CHECK-NEXT: s_mov_b32 s55, s54
34+
; CHECK-NEXT: s_load_dwordx2 s[54:55], s[4:5], 0x0
3535
; CHECK-NEXT: s_mov_b32 s53, s14
36-
; CHECK-NEXT: v_pk_mov_b32 v[62:63], s[54:55], s[54:55] op_sel:[0,1]
36+
; CHECK-NEXT: v_mov_b32_e32 v46, s6
37+
; CHECK-NEXT: v_pk_mov_b32 v[56:57], s[64:65], s[64:65] op_sel:[0,1]
3738
; CHECK-NEXT: s_mov_b64 s[4:5], s[48:49]
39+
; CHECK-NEXT: s_mov_b64 s[6:7], s[38:39]
3840
; CHECK-NEXT: s_mov_b64 s[8:9], s[50:51]
3941
; CHECK-NEXT: s_mov_b32 s12, s14
4042
; CHECK-NEXT: s_mov_b32 s13, s15
@@ -44,14 +46,13 @@ define amdgpu_kernel void @foo(ptr addrspace(5) %ptr5, ptr %p0, double %v0, <4 x
4446
; CHECK-NEXT: s_mov_b32 s33, s16
4547
; CHECK-NEXT: s_mov_b32 s52, s15
4648
; CHECK-NEXT: s_mov_b64 s[36:37], s[10:11]
47-
; CHECK-NEXT: s_mov_b64 s[38:39], s[6:7]
4849
; CHECK-NEXT: v_mov_b32_e32 v40, v0
4950
; CHECK-NEXT: v_mov_b32_e32 v60, s66
5051
; CHECK-NEXT: v_mov_b32_e32 v61, s67
5152
; CHECK-NEXT: flat_store_dwordx2 v[56:57], v[62:63]
5253
; CHECK-NEXT: ; kill: def $sgpr15 killed $sgpr15
5354
; CHECK-NEXT: s_waitcnt lgkmcnt(0)
54-
; CHECK-NEXT: s_swappc_b64 s[30:31], s[64:65]
55+
; CHECK-NEXT: s_swappc_b64 s[30:31], s[54:55]
5556
; CHECK-NEXT: flat_load_dwordx2 v[58:59], v[56:57]
5657
; CHECK-NEXT: v_mov_b32_e32 v0, 0
5758
; CHECK-NEXT: v_mov_b32_e32 v1, 0x3ff00000
@@ -67,7 +68,7 @@ define amdgpu_kernel void @foo(ptr addrspace(5) %ptr5, ptr %p0, double %v0, <4 x
6768
; CHECK-NEXT: flat_store_dwordx2 v[56:57], v[62:63]
6869
; CHECK-NEXT: s_waitcnt vmcnt(0)
6970
; CHECK-NEXT: ; kill: def $sgpr15 killed $sgpr15
70-
; CHECK-NEXT: s_swappc_b64 s[30:31], s[64:65]
71+
; CHECK-NEXT: s_swappc_b64 s[30:31], s[54:55]
7172
; CHECK-NEXT: flat_load_dwordx2 v[0:1], v[46:47] glc
7273
; CHECK-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
7374
; CHECK-NEXT: v_mov_b32_e32 v1, s67
@@ -76,7 +77,7 @@ define amdgpu_kernel void @foo(ptr addrspace(5) %ptr5, ptr %p0, double %v0, <4 x
7677
; CHECK-NEXT: s_waitcnt vmcnt(0)
7778
; CHECK-NEXT: flat_store_dwordx2 v[56:57], v[60:61]
7879
; CHECK-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4
79-
; CHECK-NEXT: v_mov_b32_e32 v1, s54
80+
; CHECK-NEXT: v_mov_b32_e32 v1, 0
8081
; CHECK-NEXT: v_cmp_lt_i32_e32 vcc, 0, v42
8182
; CHECK-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
8283
; CHECK-NEXT: ; implicit-def: $vgpr4

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