Skip to content

Commit 6469adc

Browse files
PanTao2PanTao2
committed
Add the EOR instruction in AArch64InstrInfo::expandPostRAPseudo
1 parent 309524a commit 6469adc

File tree

6 files changed

+30
-47
lines changed

6 files changed

+30
-47
lines changed

‎llvm/lib/Target/AArch64/AArch64ISelLowering.cpp‎

Lines changed: 1 addition & 19 deletions
Original file line numberDiff line numberDiff line change
@@ -28965,25 +28965,7 @@ void AArch64TargetLowering::ReplaceNodeResults(
2896528965
bool AArch64TargetLowering::useLoadStackGuardNode(const Module &M) const {
2896628966
if (Subtarget->isTargetAndroid() || Subtarget->isTargetFuchsia())
2896728967
return TargetLowering::useLoadStackGuardNode(M);
28968-
return !Subtarget->getTargetTriple().isOSMSVCRT() ||
28969-
Subtarget->isTargetMachO() ||
28970-
getTargetMachine().Options.EnableGlobalISel;
28971-
}
28972-
28973-
bool AArch64TargetLowering::useStackGuardXorFP() const {
28974-
// Currently only MSVC CRTs XOR the frame pointer into the stack guard value.
28975-
return Subtarget->getTargetTriple().isOSMSVCRT() &&
28976-
!Subtarget->isTargetMachO() &&
28977-
!getTargetMachine().Options.EnableGlobalISel;
28978-
}
28979-
28980-
SDValue AArch64TargetLowering::emitStackGuardXorFP(SelectionDAG &DAG,
28981-
SDValue Val,
28982-
const SDLoc &DL) const {
28983-
return DAG.getNode(ISD::XOR, DL, Val.getValueType(), Val,
28984-
DAG.getCopyFromReg(DAG.getEntryNode(), DL,
28985-
getStackPointerRegisterToSaveRestore(),
28986-
MVT::i64));
28968+
return true;
2898728969
}
2898828970

2898928971
unsigned AArch64TargetLowering::combineRepeatedFPDivisors() const {

‎llvm/lib/Target/AArch64/AArch64ISelLowering.h‎

Lines changed: 0 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -359,9 +359,6 @@ class AArch64TargetLowering : public TargetLowering {
359359
shouldExpandAtomicCmpXchgInIR(AtomicCmpXchgInst *AI) const override;
360360

361361
bool useLoadStackGuardNode(const Module &M) const override;
362-
bool useStackGuardXorFP() const override;
363-
SDValue emitStackGuardXorFP(SelectionDAG &DAG, SDValue Val,
364-
const SDLoc &DL) const override;
365362
TargetLoweringBase::LegalizeTypeAction
366363
getPreferredVectorAction(MVT VT) const override;
367364

‎llvm/lib/Target/AArch64/AArch64InstrInfo.cpp‎

Lines changed: 8 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -2275,6 +2275,14 @@ bool AArch64InstrInfo::expandPostRAPseudo(MachineInstr &MI) const {
22752275
.addGlobalAddress(GV, 0, LoFlags)
22762276
.addMemOperand(*MI.memoperands_begin());
22772277
}
2278+
if (Subtarget.getTargetTriple().isOSMSVCRT() &&
2279+
!Subtarget.getTargetLowering()
2280+
->getTargetMachine()
2281+
.Options.EnableGlobalISel) {
2282+
BuildMI(MBB, MI, DL, get(AArch64::EORWrr), Reg)
2283+
.addReg(Reg, RegState::Kill)
2284+
.addReg(AArch64::SP);
2285+
}
22782286
}
22792287

22802288
MBB.erase(MI);

‎llvm/lib/Target/AArch64/AArch64SelectionDAGInfo.cpp‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -32,7 +32,7 @@ AArch64SelectionDAGInfo::AArch64SelectionDAGInfo()
3232

3333
void AArch64SelectionDAGInfo::verifyTargetNode(const SelectionDAG &DAG,
3434
const SDNode *N) const {
35-
// SelectionDAGGenTargetInfo::verifyTargetNode(DAG, N);
35+
SelectionDAGGenTargetInfo::verifyTargetNode(DAG, N);
3636

3737
#ifndef NDEBUG
3838
// Some additional checks not yet implemented by verifyTargetNode.

‎llvm/test/CodeGen/AArch64/mingw-refptr.ll‎

Lines changed: 12 additions & 18 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
22
; RUN: llc < %s -mtriple=aarch64-w64-mingw32 | FileCheck %s --check-prefixes=CHECK,CHECK-SD
3-
; RUN: llc < %s -mtriple=aarch64-w64-mingw32 -global-isel | FileCheck %s --check-prefixes=CHECK-GI
3+
; RUN: llc < %s -mtriple=aarch64-w64-mingw32 -global-isel | FileCheck %s --check-prefixes=CHECK,CHECK-GI
44

55
@var = external local_unnamed_addr global i32, align 4
66
@dsolocalvar = external dso_local local_unnamed_addr global i32, align 4
@@ -82,31 +82,25 @@ define dso_local void @sspFunc() #0 {
8282
; CHECK-NEXT: // %bb.0: // %entry
8383
; CHECK-NEXT: sub sp, sp, #32
8484
; CHECK-NEXT: .seh_stackalloc 32
85-
; CHECK-NEXT: str x19, [sp, #16] // 8-byte Folded Spill
86-
; CHECK-NEXT: .seh_save_reg x19, 16
87-
; CHECK-NEXT: str x30, [sp, #24] // 8-byte Folded Spill
88-
; CHECK-NEXT: .seh_save_reg x30, 24
85+
; CHECK-NEXT: str x30, [sp, #16] // 8-byte Folded Spill
86+
; CHECK-NEXT: .seh_save_reg x30, 16
8987
; CHECK-NEXT: .seh_endprologue
90-
; CHECK-NEXT: adrp x19, .refptr.__stack_chk_guard
91-
; CHECK-NEXT: mov x9, sp
88+
; CHECK-NEXT: adrp x8, .refptr.__stack_chk_guard
9289
; CHECK-NEXT: add x0, sp, #7
93-
; CHECK-NEXT: ldr x19, [x19, :lo12:.refptr.__stack_chk_guard]
94-
; CHECK-NEXT: ldr x8, [x19]
95-
; CHECK-NEXT: eor x8, x8, x9
90+
; CHECK-NEXT: ldr x8, [x8, :lo12:.refptr.__stack_chk_guard]
91+
; CHECK-NEXT: ldr x8, [x8]
9692
; CHECK-NEXT: str x8, [sp, #8]
9793
; CHECK-NEXT: bl ptrUser
94+
; CHECK-NEXT: adrp x8, .refptr.__stack_chk_guard
95+
; CHECK-NEXT: ldr x8, [x8, :lo12:.refptr.__stack_chk_guard]
9896
; CHECK-NEXT: ldr x9, [sp, #8]
99-
; CHECK-NEXT: mov x8, sp
100-
; CHECK-NEXT: ldr x10, [x19]
101-
; CHECK-NEXT: eor x8, x9, x8
102-
; CHECK-NEXT: cmp x10, x8
97+
; CHECK-NEXT: ldr x8, [x8]
98+
; CHECK-NEXT: cmp x8, x9
10399
; CHECK-NEXT: b.ne .LBB6_2
104100
; CHECK-NEXT: // %bb.1: // %entry
105101
; CHECK-NEXT: .seh_startepilogue
106-
; CHECK-NEXT: ldr x30, [sp, #24] // 8-byte Folded Reload
107-
; CHECK-NEXT: .seh_save_reg x30, 24
108-
; CHECK-NEXT: ldr x19, [sp, #16] // 8-byte Folded Reload
109-
; CHECK-NEXT: .seh_save_reg x19, 16
102+
; CHECK-NEXT: ldr x30, [sp, #16] // 8-byte Folded Reload
103+
; CHECK-NEXT: .seh_save_reg x30, 16
110104
; CHECK-NEXT: add sp, sp, #32
111105
; CHECK-NEXT: .seh_stackalloc 32
112106
; CHECK-NEXT: .seh_endepilogue

‎llvm/test/CodeGen/AArch64/stack-protector-target.ll‎

Lines changed: 8 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -29,16 +29,18 @@ declare void @_Z7CapturePi(ptr)
2929
; FUCHSIA-AARCH64-COMMON: ldr [[D:.*]], [sp,
3030
; FUCHSIA-AARCH64-COMMON: cmp [[C]], [[D]]
3131

32-
; WINDOWS-AARCH64: adrp x19, __security_cookie
33-
; WINDOWS-AARCH64: ldr x8, [x19, :lo12:__security_cookie]
32+
; WINDOWS-AARCH64: adrp x8, __security_cookie
33+
; WINDOWS-AARCH64: ldr x8, [x8, :lo12:__security_cookie]
34+
; WINDOWS-AARCH64: eor x8, x8, sp
3435
; WINDOWS-AARCH64: str x8, [sp, #8]
3536
; WINDOWS-AARCH64: bl _Z7CapturePi
36-
; WINDOWS-AARCH64: ldr x8, [sp, #8]
37+
; WINDOWS-AARCH64: ldr x0, [sp, #8]
3738
; WINDOWS-AARCH64: bl __security_check_cookie
3839

39-
; WINDOWS-ARM64EC: adrp x19, __security_cookie
40-
; WINDOWS-ARM64EC: ldr x8, [x19, :lo12:__security_cookie]
40+
; WINDOWS-ARM64EC: adrp x8, __security_cookie
41+
; WINDOWS-ARM64EC: ldr x8, [x8, :lo12:__security_cookie]
42+
; WINDOWS-ARM64EC: eor x8, x8, sp
4143
; WINDOWS-ARM64EC: str x8, [sp, #8]
4244
; WINDOWS-ARM64EC: bl "#_Z7CapturePi"
43-
; WINDOWS-ARM64EC: ldr x8, [sp, #8]
45+
; WINDOWS-ARM64EC: ldr x0, [sp, #8]
4446
; WINDOWS-ARM64EC: bl "#__security_check_cookie_arm64ec"

0 commit comments

Comments
 (0)