corrected the format. fixes 109778

Author: akshaykumars614

llvm/lib/Target/AArch64/AArch64ISelLowering.cpp

@@ -11522,8 +11522,8 @@ getRegisterByName(const char* RegName, LLT VT, const MachineFunction &MF) const
   if (AArch64::X1 <= Reg && Reg <= AArch64::X28) {
     const AArch64RegisterInfo *MRI = Subtarget->getRegisterInfo();
     unsigned DwarfRegNum = MRI->getDwarfRegNum(Reg, false);
-// check if X Register is reserved at either subtarget level or the 
-// machine function level.
+    // check if X Register is reserved at either subtarget level or the
+    // machine function level.
     if (Subtarget->isXRegisterReserved(DwarfRegNum) ||
         MRI->isReservedReg(MF, Reg))
       Reg = 0;