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1 parent 6f6f3b0 commit 64e4a0cCopy full SHA for 64e4a0c
llvm/test/CodeGen/AMDGPU/frame-index-elimination.ll
@@ -445,7 +445,7 @@ define amdgpu_kernel void @s_multiple_frame_indexes_literal_offsets(i32 inreg %a
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}
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; %alloca1 or alloca2 will lower to an inline constant, and one will
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-; %be a literal, so we could fold both indexes into the instruction.
+; be a literal, so we could fold both indexes into the instruction.
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; GCN-LABEL: {{^}}s_multiple_frame_indexes_one_imm_one_literal_offset:
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; GCN: s_load_dword [[ARG0:s[0-9]+]]
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