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michaelmaitlandmichaelmaitland
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[RISCV][VLOPT] Add support for integer widening multiply instructions (#112204)
This adds support for these instructions and also tests getOperandInfo for these instructions as well.
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‎llvm/lib/Target/RISCV/RISCVVLOptimizer.cpp

Lines changed: 6 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -563,7 +563,12 @@ static bool isSupportedInstr(const MachineInstr &MI) {
563563
case RISCV::VREM_VV:
564564
case RISCV::VREM_VX:
565565
// Vector Widening Integer Multiply Instructions
566-
// FIXME: Add support
566+
case RISCV::VWMUL_VV:
567+
case RISCV::VWMUL_VX:
568+
case RISCV::VWMULSU_VV:
569+
case RISCV::VWMULSU_VX:
570+
case RISCV::VWMULU_VV:
571+
case RISCV::VWMULU_VX:
567572
// Vector Single-Width Integer Multiply-Add Instructions
568573
// FIXME: Add support
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// Vector Widening Integer Multiply-Add Instructions

‎llvm/test/CodeGen/RISCV/rvv/vl-opt-instrs.ll

Lines changed: 126 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1122,6 +1122,132 @@ define <vscale x 4 x i32> @vrem_vx(<vscale x 4 x i32> %a, i32 %b, iXLen %vl) {
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ret <vscale x 4 x i32> %2
11231123
}
11241124

1125+
define <vscale x 4 x i64> @vwmul_vv(<vscale x 4 x i16> %a, <vscale x 4 x i16> %b, iXLen %vl) {
1126+
; NOVLOPT-LABEL: vwmul_vv:
1127+
; NOVLOPT: # %bb.0:
1128+
; NOVLOPT-NEXT: vsetvli a1, zero, e16, m1, ta, ma
1129+
; NOVLOPT-NEXT: vwmul.vv v12, v8, v9
1130+
; NOVLOPT-NEXT: vsetvli zero, a0, e32, m2, ta, ma
1131+
; NOVLOPT-NEXT: vwmul.vv v8, v12, v12
1132+
; NOVLOPT-NEXT: ret
1133+
;
1134+
; VLOPT-LABEL: vwmul_vv:
1135+
; VLOPT: # %bb.0:
1136+
; VLOPT-NEXT: vsetvli zero, a0, e16, m1, ta, ma
1137+
; VLOPT-NEXT: vwmul.vv v12, v8, v9
1138+
; VLOPT-NEXT: vsetvli zero, zero, e32, m2, ta, ma
1139+
; VLOPT-NEXT: vwmul.vv v8, v12, v12
1140+
; VLOPT-NEXT: ret
1141+
%1 = call <vscale x 4 x i32> @llvm.riscv.vwmul.nxv4i64.nxv4i32.nxv4i32(<vscale x 4 x i32> poison, <vscale x 4 x i16> %a, <vscale x 4 x i16> %b, iXLen -1)
1142+
%2 = call <vscale x 4 x i64> @llvm.riscv.vwmul.nxv4i64.nxv4i32.nxv4i32(<vscale x 4 x i64> poison, <vscale x 4 x i32> %1, <vscale x 4 x i32> %1, iXLen %vl)
1143+
ret <vscale x 4 x i64> %2
1144+
}
1145+
1146+
define <vscale x 4 x i64> @vwmul_vx(<vscale x 4 x i16> %a, i16 %b, i32 %c, iXLen %vl) {
1147+
; NOVLOPT-LABEL: vwmul_vx:
1148+
; NOVLOPT: # %bb.0:
1149+
; NOVLOPT-NEXT: vsetvli a3, zero, e16, m1, ta, ma
1150+
; NOVLOPT-NEXT: vwmul.vx v12, v8, a0
1151+
; NOVLOPT-NEXT: vsetvli zero, a2, e32, m2, ta, ma
1152+
; NOVLOPT-NEXT: vwmul.vx v8, v12, a1
1153+
; NOVLOPT-NEXT: ret
1154+
;
1155+
; VLOPT-LABEL: vwmul_vx:
1156+
; VLOPT: # %bb.0:
1157+
; VLOPT-NEXT: vsetvli zero, a2, e16, m1, ta, ma
1158+
; VLOPT-NEXT: vwmul.vx v12, v8, a0
1159+
; VLOPT-NEXT: vsetvli zero, zero, e32, m2, ta, ma
1160+
; VLOPT-NEXT: vwmul.vx v8, v12, a1
1161+
; VLOPT-NEXT: ret
1162+
%1 = call <vscale x 4 x i32> @llvm.riscv.vwmul.nxv4i32.nxv4i16.i16(<vscale x 4 x i32> poison, <vscale x 4 x i16> %a, i16 %b, iXLen -1)
1163+
%2 = call <vscale x 4 x i64> @llvm.riscv.vwmul.nxv4i64.nxv4i64.i32(<vscale x 4 x i64> poison, <vscale x 4 x i32> %1, i32 %c, iXLen %vl)
1164+
ret <vscale x 4 x i64> %2
1165+
}
1166+
1167+
define <vscale x 4 x i64> @vwmulsu_vv(<vscale x 4 x i32> %a, <vscale x 4 x i32> %b, iXLen %vl) {
1168+
; NOVLOPT-LABEL: vwmulsu_vv:
1169+
; NOVLOPT: # %bb.0:
1170+
; NOVLOPT-NEXT: vsetvli a1, zero, e32, m2, ta, ma
1171+
; NOVLOPT-NEXT: vwmulsu.vv v12, v8, v10
1172+
; NOVLOPT-NEXT: vsetvli zero, a0, e64, m4, ta, ma
1173+
; NOVLOPT-NEXT: vadd.vv v8, v12, v12
1174+
; NOVLOPT-NEXT: ret
1175+
;
1176+
; VLOPT-LABEL: vwmulsu_vv:
1177+
; VLOPT: # %bb.0:
1178+
; VLOPT-NEXT: vsetvli zero, a0, e32, m2, ta, ma
1179+
; VLOPT-NEXT: vwmulsu.vv v12, v8, v10
1180+
; VLOPT-NEXT: vsetvli zero, zero, e64, m4, ta, ma
1181+
; VLOPT-NEXT: vadd.vv v8, v12, v12
1182+
; VLOPT-NEXT: ret
1183+
%1 = call <vscale x 4 x i64> @llvm.riscv.vwmulsu.nxv4i64.nxv4i32.nxv4i32(<vscale x 4 x i64> poison, <vscale x 4 x i32> %a, <vscale x 4 x i32> %b, iXLen -1)
1184+
%2 = call <vscale x 4 x i64> @llvm.riscv.vadd.nxv4i64.nxv4i64(<vscale x 4 x i64> poison, <vscale x 4 x i64> %1, <vscale x 4 x i64> %1, iXLen %vl)
1185+
ret <vscale x 4 x i64> %2
1186+
}
1187+
1188+
define <vscale x 4 x i64> @vwmulsu_vx(<vscale x 4 x i32> %a, i32 %b, iXLen %vl) {
1189+
; NOVLOPT-LABEL: vwmulsu_vx:
1190+
; NOVLOPT: # %bb.0:
1191+
; NOVLOPT-NEXT: vsetvli a2, zero, e32, m2, ta, ma
1192+
; NOVLOPT-NEXT: vwmulsu.vx v12, v8, a0
1193+
; NOVLOPT-NEXT: vsetvli zero, a1, e64, m4, ta, ma
1194+
; NOVLOPT-NEXT: vadd.vv v8, v12, v12
1195+
; NOVLOPT-NEXT: ret
1196+
;
1197+
; VLOPT-LABEL: vwmulsu_vx:
1198+
; VLOPT: # %bb.0:
1199+
; VLOPT-NEXT: vsetvli zero, a1, e32, m2, ta, ma
1200+
; VLOPT-NEXT: vwmulsu.vx v12, v8, a0
1201+
; VLOPT-NEXT: vsetvli zero, zero, e64, m4, ta, ma
1202+
; VLOPT-NEXT: vadd.vv v8, v12, v12
1203+
; VLOPT-NEXT: ret
1204+
%1 = call <vscale x 4 x i64> @llvm.riscv.vwmulsu.nxv4i64.nxv4i32.i32(<vscale x 4 x i64> poison, <vscale x 4 x i32> %a, i32 %b, iXLen -1)
1205+
%2 = call <vscale x 4 x i64> @llvm.riscv.vadd.nxv4i64.nxv4i64(<vscale x 4 x i64> poison, <vscale x 4 x i64> %1, <vscale x 4 x i64> %1, iXLen %vl)
1206+
ret <vscale x 4 x i64> %2
1207+
}
1208+
1209+
define <vscale x 4 x i64> @vwmulu_vv(<vscale x 4 x i32> %a, <vscale x 4 x i32> %b, iXLen %vl) {
1210+
; NOVLOPT-LABEL: vwmulu_vv:
1211+
; NOVLOPT: # %bb.0:
1212+
; NOVLOPT-NEXT: vsetvli a1, zero, e32, m2, ta, ma
1213+
; NOVLOPT-NEXT: vwmulu.vv v12, v8, v10
1214+
; NOVLOPT-NEXT: vsetvli zero, a0, e64, m4, ta, ma
1215+
; NOVLOPT-NEXT: vadd.vv v8, v12, v12
1216+
; NOVLOPT-NEXT: ret
1217+
;
1218+
; VLOPT-LABEL: vwmulu_vv:
1219+
; VLOPT: # %bb.0:
1220+
; VLOPT-NEXT: vsetvli zero, a0, e32, m2, ta, ma
1221+
; VLOPT-NEXT: vwmulu.vv v12, v8, v10
1222+
; VLOPT-NEXT: vsetvli zero, zero, e64, m4, ta, ma
1223+
; VLOPT-NEXT: vadd.vv v8, v12, v12
1224+
; VLOPT-NEXT: ret
1225+
%1 = call <vscale x 4 x i64> @llvm.riscv.vwmulu.nxv4i64.nxv4i32.nxv4i32(<vscale x 4 x i64> poison, <vscale x 4 x i32> %a, <vscale x 4 x i32> %b, iXLen -1)
1226+
%2 = call <vscale x 4 x i64> @llvm.riscv.vadd.nxv4i64.nxv4i64(<vscale x 4 x i64> poison, <vscale x 4 x i64> %1, <vscale x 4 x i64> %1, iXLen %vl)
1227+
ret <vscale x 4 x i64> %2
1228+
}
1229+
1230+
define <vscale x 4 x i64> @vwmulu_vx(<vscale x 4 x i32> %a, i32 %b, iXLen %vl) {
1231+
; NOVLOPT-LABEL: vwmulu_vx:
1232+
; NOVLOPT: # %bb.0:
1233+
; NOVLOPT-NEXT: vsetvli a2, zero, e32, m2, ta, ma
1234+
; NOVLOPT-NEXT: vwmulu.vx v12, v8, a0
1235+
; NOVLOPT-NEXT: vsetvli zero, a1, e64, m4, ta, ma
1236+
; NOVLOPT-NEXT: vadd.vv v8, v12, v12
1237+
; NOVLOPT-NEXT: ret
1238+
;
1239+
; VLOPT-LABEL: vwmulu_vx:
1240+
; VLOPT: # %bb.0:
1241+
; VLOPT-NEXT: vsetvli zero, a1, e32, m2, ta, ma
1242+
; VLOPT-NEXT: vwmulu.vx v12, v8, a0
1243+
; VLOPT-NEXT: vsetvli zero, zero, e64, m4, ta, ma
1244+
; VLOPT-NEXT: vadd.vv v8, v12, v12
1245+
; VLOPT-NEXT: ret
1246+
%1 = call <vscale x 4 x i64> @llvm.riscv.vwmulu.nxv4i64.nxv4i32.i32(<vscale x 4 x i64> poison, <vscale x 4 x i32> %a, i32 %b, iXLen -1)
1247+
%2 = call <vscale x 4 x i64> @llvm.riscv.vadd.nxv4i64.nxv4i64(<vscale x 4 x i64> poison, <vscale x 4 x i64> %1, <vscale x 4 x i64> %1, iXLen %vl)
1248+
ret <vscale x 4 x i64> %2
1249+
}
1250+
11251251
define <vscale x 4 x i32> @vwmacc_vx(<vscale x 4 x i16> %a, i16 %b, iXLen %vl) {
11261252
; NOVLOPT-LABEL: vwmacc_vx:
11271253
; NOVLOPT: # %bb.0:

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