@@ -18655,22 +18655,15 @@ Value *CodeGenFunction::EmitAMDGPUBuiltinExpr(unsigned BuiltinID,
1865518655 Src0 = Builder.CreatePointerBitCastOrAddrSpaceCast(Src0, PTy);
1865618656 return Builder.CreateCall(F, { Src0, Src1, Src2, Src3, Src4 });
1865718657 }
18658- case AMDGPU::BI__builtin_amdgcn_global_atomic_fadd_v2f16:
1865918658 case AMDGPU::BI__builtin_amdgcn_global_atomic_fmin_f64:
1866018659 case AMDGPU::BI__builtin_amdgcn_global_atomic_fmax_f64:
1866118660 case AMDGPU::BI__builtin_amdgcn_flat_atomic_fadd_f64:
1866218661 case AMDGPU::BI__builtin_amdgcn_flat_atomic_fmin_f64:
1866318662 case AMDGPU::BI__builtin_amdgcn_flat_atomic_fmax_f64:
18664- case AMDGPU::BI__builtin_amdgcn_flat_atomic_fadd_f32:
18665- case AMDGPU::BI__builtin_amdgcn_flat_atomic_fadd_v2f16: {
18663+ case AMDGPU::BI__builtin_amdgcn_flat_atomic_fadd_f32: {
1866618664 Intrinsic::ID IID;
1866718665 llvm::Type *ArgTy = llvm::Type::getDoubleTy(getLLVMContext());
1866818666 switch (BuiltinID) {
18669- case AMDGPU::BI__builtin_amdgcn_global_atomic_fadd_v2f16:
18670- ArgTy = llvm::FixedVectorType::get(
18671- llvm::Type::getHalfTy(getLLVMContext()), 2);
18672- IID = Intrinsic::amdgcn_global_atomic_fadd;
18673- break;
1867418667 case AMDGPU::BI__builtin_amdgcn_global_atomic_fmin_f64:
1867518668 IID = Intrinsic::amdgcn_global_atomic_fmin;
1867618669 break;
@@ -18690,11 +18683,6 @@ Value *CodeGenFunction::EmitAMDGPUBuiltinExpr(unsigned BuiltinID,
1869018683 ArgTy = llvm::Type::getFloatTy(getLLVMContext());
1869118684 IID = Intrinsic::amdgcn_flat_atomic_fadd;
1869218685 break;
18693- case AMDGPU::BI__builtin_amdgcn_flat_atomic_fadd_v2f16:
18694- ArgTy = llvm::FixedVectorType::get(
18695- llvm::Type::getHalfTy(getLLVMContext()), 2);
18696- IID = Intrinsic::amdgcn_flat_atomic_fadd;
18697- break;
1869818686 }
1869918687 llvm::Value *Addr = EmitScalarExpr(E->getArg(0));
1870018688 llvm::Value *Val = EmitScalarExpr(E->getArg(1));
@@ -19085,7 +19073,9 @@ Value *CodeGenFunction::EmitAMDGPUBuiltinExpr(unsigned BuiltinID,
1908519073 case AMDGPU::BI__builtin_amdgcn_ds_atomic_fadd_v2f16:
1908619074 case AMDGPU::BI__builtin_amdgcn_ds_atomic_fadd_v2bf16:
1908719075 case AMDGPU::BI__builtin_amdgcn_global_atomic_fadd_f32:
19088- case AMDGPU::BI__builtin_amdgcn_global_atomic_fadd_f64: {
19076+ case AMDGPU::BI__builtin_amdgcn_global_atomic_fadd_f64:
19077+ case AMDGPU::BI__builtin_amdgcn_global_atomic_fadd_v2f16:
19078+ case AMDGPU::BI__builtin_amdgcn_flat_atomic_fadd_v2f16: {
1908919079 llvm::AtomicRMWInst::BinOp BinOp;
1909019080 switch (BuiltinID) {
1909119081 case AMDGPU::BI__builtin_amdgcn_atomic_inc32:
@@ -19103,6 +19093,8 @@ Value *CodeGenFunction::EmitAMDGPUBuiltinExpr(unsigned BuiltinID,
1910319093 case AMDGPU::BI__builtin_amdgcn_ds_atomic_fadd_v2bf16:
1910419094 case AMDGPU::BI__builtin_amdgcn_global_atomic_fadd_f32:
1910519095 case AMDGPU::BI__builtin_amdgcn_global_atomic_fadd_f64:
19096+ case AMDGPU::BI__builtin_amdgcn_global_atomic_fadd_v2f16:
19097+ case AMDGPU::BI__builtin_amdgcn_flat_atomic_fadd_v2f16:
1910619098 BinOp = llvm::AtomicRMWInst::FAdd;
1910719099 break;
1910819100 }
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