AS

Author: optimisan

llvm/lib/CodeGen/VirtRegMap.cpp

@@ -313,6 +313,7 @@ VirtRegRewriterPass::run(MachineFunction &MF,
   VirtRegRewriter R(ClearVirtRegs, &Indexes, &LIS, &LRM, &VRM, &DebugVars);
   if (!R.run(MF))
     return PreservedAnalyses::all();
+
   auto PA = getMachineFunctionPassPreservedAnalyses();
   PA.preserveSet<CFGAnalyses>();
   PA.preserve<LiveIntervalsAnalysis>();
@@ -773,10 +774,9 @@ void VirtRegRewriter::rewrite() {
 
 void VirtRegRewriterPass::printPipeline(
     raw_ostream &OS, function_ref<StringRef(StringRef)>) const {
-  OS << "virt-reg-rewriter<";
+  OS << "virt-reg-rewriter";
   if (!ClearVirtRegs)
-    OS << "no-";
-  OS << "clear-vregs>";
+    OS << "<no-clear-vregs>";
 }
 
 FunctionPass *llvm::createVirtRegRewriter(bool ClearVirtRegs) {

llvm/test/CodeGen/AMDGPU/alloc-aligned-tuples-gfx90a.mir

@@ -1,6 +1,6 @@
 # RUN: llc -mtriple=amdgcn -mcpu=gfx90a -start-before=greedy,0 -stop-after=virtregrewriter,2 -verify-machineinstrs -o - %s | FileCheck --check-prefixes=GCN,GFX90A %s
 
-# RUN: llc -enable-new-pm -mtriple=amdgcn -mcpu=gfx90a -start-before=greedy,0 -stop-after=virtregrewriter,2 -verify-machineinstrs -o - %s | FileCheck --check-prefixes=GCN,GFX90A %s
+# RUN: llc -enable-new-pm -mtriple=amdgcn -mcpu=gfx90a -start-before=greedy,0 -stop-after=virt-reg-rewriter,2 -o - %s | FileCheck --check-prefixes=GCN,GFX90A %s
 # Using the unaligned vector tuples are OK as long as they aren't used
 # in a real instruction.