We read every piece of feedback, and take your input very seriously.
To see all available qualifiers, see our documentation.
There was an error while loading. Please reload this page.
1 parent 9c25114 commit 65dc6f2Copy full SHA for 65dc6f2
mlir/test/Conversion/NVVMToLLVM/nvvm-to-llvm.mlir
@@ -704,4 +704,4 @@ llvm.func @ex2(%input : f32, %pred : i1) {
704
// CHECK: %{{.*}} = llvm.inline_asm has_side_effects asm_dialect = att "@$1 ex2.approx.ftz.f32 $0, $1;", "=f,f,b" %{{.*}}, %{{.*}} : (f32, i1) -> f32
705
%1 = nvvm.inline_ptx "ex2.approx.ftz.f32 $0, $1;" (%input), predicate = %pred : f32, i1 -> f32
706
llvm.return
707
-}
+}
0 commit comments