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Add a complex test with mismatched types
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‎llvm/test/Transforms/LoadStoreVectorizer/AMDGPU/merge-vectors-complex.ll‎

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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
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; RUN: opt -mtriple=amdgcn-amd-amdhsa -passes=load-store-vectorizer -S -o - %s | FileCheck %s
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define void @merge_i32_v2i16_f32_v4i8(ptr addrspace(1) %ptr1, ptr addrspace(2) %ptr2) {
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; CHECK-LABEL: define void @merge_i32_v2i16_f32_v4i8(
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; CHECK-SAME: ptr addrspace(1) [[PTR1:%.*]], ptr addrspace(2) [[PTR2:%.*]]) {
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; CHECK-NEXT: [[GEP1:%.*]] = getelementptr inbounds i32, ptr addrspace(1) [[PTR1]], i64 0
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; CHECK-NEXT: [[LOAD1:%.*]] = load i32, ptr addrspace(1) [[GEP1]], align 4
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; CHECK-NEXT: [[GEP2:%.*]] = getelementptr inbounds <2 x i16>, ptr addrspace(1) [[PTR1]], i64 1
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; CHECK-NEXT: [[LOAD2:%.*]] = load <2 x i16>, ptr addrspace(1) [[GEP2]], align 4
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; CHECK-NEXT: [[GEP3:%.*]] = getelementptr inbounds float, ptr addrspace(1) [[PTR1]], i64 2
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; CHECK-NEXT: [[LOAD3:%.*]] = load float, ptr addrspace(1) [[GEP3]], align 4
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; CHECK-NEXT: [[GEP4:%.*]] = getelementptr inbounds <4 x i8>, ptr addrspace(1) [[PTR1]], i64 3
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; CHECK-NEXT: [[LOAD4:%.*]] = load <4 x i8>, ptr addrspace(1) [[GEP4]], align 4
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; CHECK-NEXT: [[STORE_GEP1:%.*]] = getelementptr inbounds i32, ptr addrspace(2) [[PTR2]], i64 0
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; CHECK-NEXT: store i32 [[LOAD1]], ptr addrspace(2) [[STORE_GEP1]], align 4
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; CHECK-NEXT: [[STORE_GEP2:%.*]] = getelementptr inbounds <2 x i16>, ptr addrspace(2) [[PTR2]], i64 1
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; CHECK-NEXT: store <2 x i16> [[LOAD2]], ptr addrspace(2) [[STORE_GEP2]], align 4
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; CHECK-NEXT: [[STORE_GEP3:%.*]] = getelementptr inbounds float, ptr addrspace(2) [[PTR2]], i64 2
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; CHECK-NEXT: store float [[LOAD3]], ptr addrspace(2) [[STORE_GEP3]], align 4
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; CHECK-NEXT: [[STORE_GEP4:%.*]] = getelementptr inbounds <4 x i8>, ptr addrspace(2) [[PTR2]], i64 3
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; CHECK-NEXT: store <4 x i8> [[LOAD4]], ptr addrspace(2) [[STORE_GEP4]], align 4
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; CHECK-NEXT: ret void
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;
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%gep1 = getelementptr inbounds i32, ptr addrspace(1) %ptr1, i64 0
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%load1 = load i32, ptr addrspace(1) %gep1, align 4
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%gep2 = getelementptr inbounds <2 x i16>, ptr addrspace(1) %ptr1, i64 1
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%load2 = load <2 x i16>, ptr addrspace(1) %gep2, align 4
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%gep3 = getelementptr inbounds float, ptr addrspace(1) %ptr1, i64 2
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%load3 = load float, ptr addrspace(1) %gep3, align 4
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%gep4 = getelementptr inbounds <4 x i8>, ptr addrspace(1) %ptr1, i64 3
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%load4 = load <4 x i8>, ptr addrspace(1) %gep4, align 4
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%store.gep1 = getelementptr inbounds i32, ptr addrspace(2) %ptr2, i64 0
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store i32 %load1, ptr addrspace(2) %store.gep1, align 4
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%store.gep2 = getelementptr inbounds <2 x i16>, ptr addrspace(2) %ptr2, i64 1
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store <2 x i16> %load2, ptr addrspace(2) %store.gep2, align 4
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%store.gep3 = getelementptr inbounds float, ptr addrspace(2) %ptr2, i64 2
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store float %load3, ptr addrspace(2) %store.gep3, align 4
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%store.gep4 = getelementptr inbounds <4 x i8>, ptr addrspace(2) %ptr2, i64 3
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store <4 x i8> %load4, ptr addrspace(2) %store.gep4, align 4
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ret void
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}
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define void @merge_f32_v2f16_type(ptr addrspace(1) %ptr1, ptr addrspace(2) %ptr2) {
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; CHECK-LABEL: define void @merge_f32_v2f16_type(
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; CHECK-SAME: ptr addrspace(1) [[PTR1:%.*]], ptr addrspace(2) [[PTR2:%.*]]) {
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; CHECK-NEXT: [[GEP1:%.*]] = getelementptr inbounds float, ptr addrspace(1) [[PTR1]], i64 0
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; CHECK-NEXT: [[LOAD1:%.*]] = load float, ptr addrspace(1) [[GEP1]], align 4
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; CHECK-NEXT: [[GEP2:%.*]] = getelementptr inbounds <2 x half>, ptr addrspace(1) [[PTR1]], i64 1
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; CHECK-NEXT: [[LOAD2:%.*]] = load <2 x half>, ptr addrspace(1) [[GEP2]], align 4
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; CHECK-NEXT: [[STORE_GEP1:%.*]] = getelementptr inbounds i32, ptr addrspace(2) [[PTR2]], i64 0
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; CHECK-NEXT: store float [[LOAD1]], ptr addrspace(2) [[STORE_GEP1]], align 4
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; CHECK-NEXT: [[STORE_GEP2:%.*]] = getelementptr inbounds <2 x half>, ptr addrspace(2) [[PTR2]], i64 1
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; CHECK-NEXT: store <2 x half> [[LOAD2]], ptr addrspace(2) [[STORE_GEP2]], align 4
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; CHECK-NEXT: ret void
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;
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%gep1 = getelementptr inbounds float, ptr addrspace(1) %ptr1, i64 0
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%load1 = load float, ptr addrspace(1) %gep1, align 4
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%gep2 = getelementptr inbounds <2 x half>, ptr addrspace(1) %ptr1, i64 1
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%load2 = load <2 x half>, ptr addrspace(1) %gep2, align 4
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%store.gep1 = getelementptr inbounds i32, ptr addrspace(2) %ptr2, i64 0
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store float %load1, ptr addrspace(2) %store.gep1, align 4
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%store.gep2 = getelementptr inbounds <2 x half>, ptr addrspace(2) %ptr2, i64 1
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store <2 x half> %load2, ptr addrspace(2) %store.gep2, align 4
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ret void
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}
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define void @merge_v2f16_bfloat_type(ptr addrspace(1) %ptr1, ptr addrspace(2) %ptr2) {
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; CHECK-LABEL: define void @merge_v2f16_bfloat_type(
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; CHECK-SAME: ptr addrspace(1) [[PTR1:%.*]], ptr addrspace(2) [[PTR2:%.*]]) {
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; CHECK-NEXT: [[GEP1:%.*]] = getelementptr inbounds bfloat, ptr addrspace(1) [[PTR1]], i64 0
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; CHECK-NEXT: [[LOAD1:%.*]] = load bfloat, ptr addrspace(1) [[GEP1]], align 4
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; CHECK-NEXT: [[GEP2:%.*]] = getelementptr inbounds <2 x half>, ptr addrspace(1) [[PTR1]], i64 1
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; CHECK-NEXT: [[LOAD2:%.*]] = load <2 x half>, ptr addrspace(1) [[GEP2]], align 4
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; CHECK-NEXT: [[STORE_GEP1:%.*]] = getelementptr inbounds i32, ptr addrspace(2) [[PTR2]], i64 0
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; CHECK-NEXT: store bfloat [[LOAD1]], ptr addrspace(2) [[STORE_GEP1]], align 4
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; CHECK-NEXT: [[STORE_GEP2:%.*]] = getelementptr inbounds <2 x half>, ptr addrspace(2) [[PTR2]], i64 1
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; CHECK-NEXT: store <2 x half> [[LOAD2]], ptr addrspace(2) [[STORE_GEP2]], align 4
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; CHECK-NEXT: ret void
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;
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%gep1 = getelementptr inbounds bfloat, ptr addrspace(1) %ptr1, i64 0
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%load1 = load bfloat, ptr addrspace(1) %gep1, align 4
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%gep2 = getelementptr inbounds <2 x half>, ptr addrspace(1) %ptr1, i64 1
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%load2 = load <2 x half>, ptr addrspace(1) %gep2, align 4
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%store.gep1 = getelementptr inbounds i32, ptr addrspace(2) %ptr2, i64 0
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store bfloat %load1, ptr addrspace(2) %store.gep1, align 4
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%store.gep2 = getelementptr inbounds <2 x half>, ptr addrspace(2) %ptr2, i64 1
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store <2 x half> %load2, ptr addrspace(2) %store.gep2, align 4
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ret void
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}
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define void @no_merge_mixed_ptr_addrspaces(ptr addrspace(1) %ptr1, ptr addrspace(2) %ptr2) {
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; CHECK-LABEL: define void @no_merge_mixed_ptr_addrspaces(
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; CHECK-SAME: ptr addrspace(1) [[PTR1:%.*]], ptr addrspace(2) [[PTR2:%.*]]) {
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; CHECK-NEXT: [[GEP1:%.*]] = getelementptr inbounds ptr addrspace(1), ptr addrspace(1) [[PTR1]], i64 0
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; CHECK-NEXT: [[LOAD1:%.*]] = load ptr addrspace(1), ptr addrspace(1) [[GEP1]], align 4
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; CHECK-NEXT: [[GEP2:%.*]] = getelementptr inbounds ptr addrspace(2), ptr addrspace(1) [[PTR1]], i64 1
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; CHECK-NEXT: [[LOAD2:%.*]] = load ptr addrspace(2), ptr addrspace(1) [[GEP2]], align 4
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; CHECK-NEXT: [[STORE_GEP1:%.*]] = getelementptr inbounds i32, ptr addrspace(2) [[PTR2]], i64 0
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; CHECK-NEXT: store ptr addrspace(1) [[LOAD1]], ptr addrspace(2) [[STORE_GEP1]], align 4
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; CHECK-NEXT: [[STORE_GEP2:%.*]] = getelementptr inbounds ptr addrspace(2), ptr addrspace(2) [[PTR2]], i64 1
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; CHECK-NEXT: store ptr addrspace(2) [[LOAD2]], ptr addrspace(2) [[STORE_GEP2]], align 4
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; CHECK-NEXT: ret void
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;
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%gep1 = getelementptr inbounds ptr addrspace(1), ptr addrspace(1) %ptr1, i64 0
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%load1 = load ptr addrspace(1), ptr addrspace(1) %gep1, align 4
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%gep2 = getelementptr inbounds ptr addrspace(2), ptr addrspace(1) %ptr1, i64 1
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%load2 = load ptr addrspace(2), ptr addrspace(1) %gep2, align 4
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%store.gep1 = getelementptr inbounds i32, ptr addrspace(2) %ptr2, i64 0
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store ptr addrspace(1) %load1, ptr addrspace(2) %store.gep1, align 4
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%store.gep2 = getelementptr inbounds ptr addrspace(2), ptr addrspace(2) %ptr2, i64 1
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store ptr addrspace(2) %load2, ptr addrspace(2) %store.gep2, align 4
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ret void
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}

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