Update build and test setup

statham-arm · statham-arm · commit 66a3bcb6f234 · 2025-10-07T15:54:35.000+01:00
Now we should only test the extra NaN faithfulness in cases where it's
provided by the library. Also tweaked the cmake setup to make it
easier to add more assembly files later. Plus a missing piece of
comment in fnan2.c.
diff --git a/compiler-rt/lib/builtins/CMakeLists.txt b/compiler-rt/lib/builtins/CMakeLists.txt
@@ -426,17 +426,19 @@ option(COMPILER_RT_ARM_OPTIMIZED_FP
   "On 32-bit Arm, use optimized assembly implementations of FP arithmetic. Likely to increase code size, but be faster." ON)
 
 if(COMPILER_RT_ARM_OPTIMIZED_FP)
-  set(arm_or_thumb2_base_SOURCES
+  set(assembly_files
     arm/mulsf3.S
-    arm/divsf3.S
+    arm/divsf3.S)
+  set_source_files_properties(${assembly_files}
+    PROPERTIES COMPILE_OPTIONS "-Wa,-mimplicit-it=always")
+  set(arm_or_thumb2_base_SOURCES
+    ${assembly_files}
     arm/fnan2.c
     arm/fnorm2.c
     arm/funder.c
     ${arm_or_thumb2_base_SOURCES}
   )
 endif()
-set_source_files_properties(arm/mulsf3.S arm/divsf3.S
-  PROPERTIES COMPILE_OPTIONS "-Wa,-mimplicit-it=always")
 
 set(arm_sync_SOURCES
   arm/sync_fetch_and_add_4.S
diff --git a/compiler-rt/lib/builtins/arm/fnan2.c b/compiler-rt/lib/builtins/arm/fnan2.c
@@ -13,6 +13,11 @@
 // On input, a and b are floating-point numbers in IEEE 754 encoding, and at
 // least one of them must be a NaN. The return value is the correct output NaN.
 //
+// A signalling NaN in the input (with bit 22 clear) takes priority over any
+// quiet NaN, and is adjusted on return by setting bit 22 to make it quiet. If
+// both inputs are the same type of NaN then the first input takes priority:
+// the input a is used instead of b.
+//
 //===----------------------------------------------------------------------===//
 
 #include <stdint.h>
diff --git a/compiler-rt/test/builtins/CMakeLists.txt b/compiler-rt/test/builtins/CMakeLists.txt
@@ -35,6 +35,10 @@ if(APPLE)
   darwin_filter_host_archs(BUILTIN_SUPPORTED_ARCH BUILTIN_TEST_ARCH)
 endif()
 
+if(COMPILER_RT_ARM_OPTIMIZED_FP)
+  list(APPEND BUILTINS_TEST_TARGET_CFLAGS -DCOMPILER_RT_ARM_OPTIMIZED_FP)
+endif()
+
 foreach(arch ${BUILTIN_TEST_ARCH})
   set(BUILTINS_TEST_TARGET_ARCH ${arch})
   string(TOLOWER "-${arch}-${OS_NAME}" BUILTINS_TEST_CONFIG_SUFFIX)
diff --git a/compiler-rt/test/builtins/Unit/divsf3_test.c b/compiler-rt/test/builtins/Unit/divsf3_test.c
@@ -11,13 +11,27 @@
 
 #include "fp_test.h"
 
+// By default this test uses compareResultF to check the returned floats, which
+// accepts any returned NaN if the expected result is the canonical NaN value
+// 0x7fc00000. For the Arm optimized FP implementation, which commits to a more
+// detailed handling of NaNs, we tighten up the check and include some extra
+// test cases specific to that NaN policy.
+#if (__arm__ && !(__thumb__ && !__thumb2__)) && COMPILER_RT_ARM_OPTIMIZED_FP
+#  define EXPECT_EXACT_RESULTS
+#  define ARM_NAN_HANDLING
+#endif
+
 // Returns: a / b
 COMPILER_RT_ABI float __divsf3(float a, float b);
 
 int test__divsf3(uint32_t a_rep, uint32_t b_rep, uint32_t expected_rep) {
   float a = fromRep32(a_rep), b = fromRep32(b_rep);
   float x = __divsf3(a, b);
+#ifdef EXPECT_EXACT_RESULTS
+  int ret = toRep32(x) == expected_rep;
+#else
   int ret = compareResultF(x, expected_rep);
+#endif
 
   if (ret) {
     printf("error in test__divsf3(%08" PRIx32 ", %08" PRIx32 ") = %08" PRIx32
@@ -309,10 +323,29 @@ int main(void) {
   status |= test__divsf3(0x2cbed883, 0x333f6113, 0x38ff4953);
   status |= test__divsf3(0x3f87ffff, 0x7f001000, 0x0043f781);
 
-#if __thumb__ && !__thumb2__
-  // These tests depend on Arm-specific IEEE 754 implementation choices
-  // regarding NaNs, which are satisfied by arm/mulsf3.S but not guaranteed by
-  // other implementations:
+  // Test that the result of an operation is a NaN at all when it should be.
+  //
+  // In most configurations these tests' results are checked compared using
+  // compareResultF, so we set all the answers to the canonical NaN 0x7fc00000,
+  // which causes compareResultF to accept any NaN encoding. We also use the
+  // same value as the input NaN in tests that have one, so that even in
+  // EXPECT_EXACT_RESULTS mode these tests should pass, because 0x7fc00000 is
+  // still the exact expected NaN.
+  status |= test__divsf3(0x00000000, 0x00000000, 0x7fc00000);
+  status |= test__divsf3(0x00000000, 0x80000000, 0x7fc00000);
+  status |= test__divsf3(0x7f800000, 0x7f800000, 0x7fc00000);
+  status |= test__divsf3(0x7f800000, 0xff800000, 0x7fc00000);
+  status |= test__divsf3(0x80000000, 0x00000000, 0x7fc00000);
+  status |= test__divsf3(0x80000000, 0x80000000, 0x7fc00000);
+  status |= test__divsf3(0xff800000, 0x7f800000, 0x7fc00000);
+  status |= test__divsf3(0xff800000, 0xff800000, 0x7fc00000);
+  status |= test__divsf3(0x3f800000, 0x7fc00000, 0x7fc00000);
+  status |= test__divsf3(0x7fc00000, 0x3f800000, 0x7fc00000);
+  status |= test__divsf3(0x7fc00000, 0x7fc00000, 0x7fc00000);
+
+#ifdef ARM_NAN_HANDLING
+  // Tests specific to the NaN handling of Arm hardware, mimicked by
+  // arm/divsf3.S:
   //
   //  - a quiet NaN is distinguished by the top mantissa bit being 1
   //
@@ -324,7 +357,10 @@ int main(void) {
   //    from the first operand
   //
   //  - if both operands are quiet NaNs then the output NaN is the first
-  //    operand.
+  //    operand
+  //
+  //  - invalid operations not involving an input NaN return the quiet
+  //    NaN with fewest bits set, 0x7fc00000.
 
   status |= test__divsf3(0x00000000, 0x00000000, 0x7fc00000);
   status |= test__divsf3(0x00000000, 0x7fad4be3, 0x7fed4be3);
@@ -386,7 +422,7 @@ int main(void) {
   status |= test__divsf3(0xff800000, 0x7f857fdc, 0x7fc57fdc);
   status |= test__divsf3(0xff800000, 0x7fde0397, 0x7fde0397);
   status |= test__divsf3(0xff800000, 0xff800000, 0x7fc00000);
-#endif // __arm__
+#endif // ARM_NAN_HANDLING
 
   return status;
 }
diff --git a/compiler-rt/test/builtins/Unit/mulsf3_test.c b/compiler-rt/test/builtins/Unit/mulsf3_test.c
@@ -11,13 +11,27 @@
 
 #include "fp_test.h"
 
-// Returns: a + b
+// By default this test uses compareResultF to check the returned floats, which
+// accepts any returned NaN if the expected result is the canonical NaN value
+// 0x7fc00000. For the Arm optimized FP implementation, which commits to a more
+// detailed handling of NaNs, we tighten up the check and include some extra
+// test cases specific to that NaN policy.
+#if (__arm__ && !(__thumb__ && !__thumb2__)) && COMPILER_RT_ARM_OPTIMIZED_FP
+#  define EXPECT_EXACT_RESULTS
+#  define ARM_NAN_HANDLING
+#endif
+
+// Returns: a * b
 COMPILER_RT_ABI float __mulsf3(float a, float b);
 
 int test__mulsf3(uint32_t a_rep, uint32_t b_rep, uint32_t expected_rep) {
   float a = fromRep32(a_rep), b = fromRep32(b_rep);
   float x = __mulsf3(a, b);
+#ifdef EXPECT_EXACT_RESULTS
+  int ret = toRep32(x) == expected_rep;
+#else
   int ret = compareResultF(x, expected_rep);
+#endif
 
   if (ret) {
     printf("error in test__mulsf3(%08" PRIx32 ", %08" PRIx32 ") = %08" PRIx32
@@ -27,7 +41,7 @@ int test__mulsf3(uint32_t a_rep, uint32_t b_rep, uint32_t expected_rep) {
   return ret;
 }
 
-int main() {
+int main(void) {
   int status = 0;
 
   status |= test__mulsf3(0x00000000, 0x00000000, 0x00000000);
@@ -505,10 +519,25 @@ int main() {
   status |= test__mulsf3(0x19ffc008, 0x1a002004, 0x00000001);
   status |= test__mulsf3(0x7f7ffff0, 0xc0000008, 0xff800000);
 
-#if __thumb__ && !__thumb2__
-  // These tests depend on Arm-specific IEEE 754 implementation choices
-  // regarding NaNs, which are satisfied by arm/mulsf3.S but not guaranteed by
-  // other implementations:
+  // Test that the result of an operation is a NaN at all when it should be.
+  //
+  // In most configurations these tests' results are checked compared using
+  // compareResultF, so we set all the answers to the canonical NaN 0x7fc00000,
+  // which causes compareResultF to accept any NaN encoding. We also use the
+  // same value as the input NaN in tests that have one, so that even in
+  // EXPECT_EXACT_RESULTS mode these tests should pass, because 0x7fc00000 is
+  // still the exact expected NaN.
+  status |= test__mulsf3(0x7f800000, 0x00000000, 0x7fc00000);
+  status |= test__mulsf3(0x7f800000, 0x80000000, 0x7fc00000);
+  status |= test__mulsf3(0x80000000, 0x7f800000, 0x7fc00000);
+  status |= test__mulsf3(0x80000000, 0xff800000, 0x7fc00000);
+  status |= test__mulsf3(0x3f800000, 0x7fc00000, 0x7fc00000);
+  status |= test__mulsf3(0x7fc00000, 0x3f800000, 0x7fc00000);
+  status |= test__mulsf3(0x7fc00000, 0x7fc00000, 0x7fc00000);
+
+#ifdef ARM_NAN_HANDLING
+  // Tests specific to the NaN handling of Arm hardware, mimicked by
+  // arm/mulsf3.S:
   //
   //  - a quiet NaN is distinguished by the top mantissa bit being 1
   //
@@ -520,7 +549,10 @@ int main() {
   //    from the first operand
   //
   //  - if both operands are quiet NaNs then the output NaN is the first
-  //    operand.
+  //    operand
+  //
+  //  - invalid operations not involving an input NaN return the quiet
+  //    NaN with fewest bits set, 0x7fc00000.
 
   status |= test__mulsf3(0x00000000, 0x7fad4be3, 0x7fed4be3);
   status |= test__mulsf3(0x00000000, 0x7fdf48c7, 0x7fdf48c7);
@@ -578,7 +610,7 @@ int main() {
   status |= test__mulsf3(0xff7fffff, 0x7feb00d7, 0x7feb00d7);
   status |= test__mulsf3(0xff800000, 0x7f857fdc, 0x7fc57fdc);
   status |= test__mulsf3(0xff800000, 0x7fde0397, 0x7fde0397);
-#endif // __arm__
+#endif // ARM_NAN_HANDLING
 
   return status;
 }
