[AMDGPU] Update for comments.

Author: harrisonGPU

llvm/lib/Target/AMDGPU/MIMGInstructions.td

@@ -1131,8 +1131,8 @@ multiclass MIMG_Atomic_Base <mimgopc op, string asm, bit isCmpSwap = 0, bit isFP
 
 multiclass MIMG_Atomic <mimgopc op, string asm, bit isCmpSwap = 0, bit isFP = 0,
                         string renamed = ""> {
-  defm "" : MIMG_Atomic_Base <op, asm, isCmpSwap, isFP, 0, renamed>;
-  defm "_NORTN" : MIMG_Atomic_Base <op, asm, isCmpSwap, isFP, 1, renamed>;
+  defm "" : MIMG_Atomic_Base <op, asm, isCmpSwap, isFP, /*noRtn=*/0, renamed>;
+  defm "_NORTN" : MIMG_Atomic_Base <op, asm, isCmpSwap, isFP, /*noRtn=*/1, renamed>;
 }
 
 multiclass MIMG_Atomic_Renamed <mimgopc op, string asm, string renamed,

llvm/lib/Target/AMDGPU/SIISelLowering.cpp

@@ -9146,10 +9146,10 @@ SDValue SITargetLowering::lowerImage(SDValue Op,
   bool IsGFX11Plus = AMDGPU::isGFX11Plus(*Subtarget);
   bool IsGFX12Plus = AMDGPU::isGFX12Plus(*Subtarget);
 
-  SmallVector<EVT, 2> OrigResultTypes(Op->values());
-  SmallVector<EVT, 2> ResultTypes = (BaseOpcode->NoReturn && BaseOpcode->Atomic)
-                                        ? SmallVector<EVT, 1>{MVT::Other}
-                                        : OrigResultTypes;
+  SmallVector<EVT, 3> ResultTypes(Op->values());
+  SmallVector<EVT, 3> OrigResultTypes(Op->values());
+  if (BaseOpcode->NoReturn && BaseOpcode->Atomic)
+    ResultTypes.erase(&ResultTypes[0]);
 
   bool IsD16 = false;
   bool IsG16 = false;