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hjagasiaAMDhjagasiaAMD
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Merge branch 'main' into amdgpu-loopalign
2 parents cfa627e + 2bf2b6b commit 676038c

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13 files changed

+165
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13 files changed

+165
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‎clang/lib/Basic/Targets/AVR.h‎

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -57,8 +57,7 @@ class LLVM_LIBRARY_VISIBILITY AVRTargetInfo : public TargetInfo {
5757
Int16Type = SignedInt;
5858
Char32Type = UnsignedLong;
5959
SigAtomicType = SignedChar;
60-
resetDataLayout(
61-
"e-P1-p:16:8-i8:8-i16:8-i32:8-i64:8-f32:8-f64:8-n8-n16:8-a:8");
60+
resetDataLayout("e-P1-p:16:8-i8:8-i16:8-i32:8-i64:8-f32:8-f64:8-n8:16-a:8");
6261
}
6362

6463
void getTargetDefines(const LangOptions &Opts,

‎clang/lib/Driver/ToolChains/Arch/AArch64.cpp‎

Lines changed: 16 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -52,6 +52,22 @@ std::string aarch64::getAArch64TargetCPU(const ArgList &Args,
5252
return "apple-m1";
5353
}
5454

55+
if (Triple.getOS() == llvm::Triple::IOS) {
56+
assert(!Triple.isSimulatorEnvironment() && "iossim should be mac-like");
57+
// iOS 26 only runs on apple-a12 and later CPUs.
58+
if (!Triple.isOSVersionLT(26))
59+
return "apple-a12";
60+
}
61+
62+
if (Triple.isWatchOS()) {
63+
assert(!Triple.isSimulatorEnvironment() && "watchossim should be mac-like");
64+
// arm64_32/arm64e watchOS requires S4 before watchOS 26, S6 after.
65+
if (Triple.getArch() == llvm::Triple::aarch64_32 || Triple.isArm64e())
66+
return Triple.isOSVersionLT(26) ? "apple-s4" : "apple-s6";
67+
// arm64 (non-e, non-32) watchOS comes later, and requires S6 anyway.
68+
return "apple-s6";
69+
}
70+
5571
if (Triple.isXROS()) {
5672
// The xrOS simulator runs on M1 as well, it should have been covered above.
5773
assert(!Triple.isSimulatorEnvironment() && "xrossim should be mac-like");

‎clang/test/Driver/aarch64-cpu-defaults-appleos26.c‎

Lines changed: 22 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,22 @@
1+
/// iOS 26 and watchOS 26 bump the default arm64 CPU targets.
2+
3+
/// arm64 iOS 26 defaults to apple-a12. arm64e already did.
4+
// RUN: %clang -target arm64-apple-ios26 -### -c %s 2>&1 | FileCheck %s --check-prefix=A12
5+
// RUN: %clang -target arm64e-apple-ios26 -### -c %s 2>&1 | FileCheck %s --check-prefix=A12
6+
7+
/// arm64e/arm64_32 watchOS 26 default to apple-s6.
8+
// RUN: %clang -target arm64e-apple-watchos26 -### -c %s 2>&1 | FileCheck %s --check-prefix=S6
9+
// RUN: %clang -target arm64_32-apple-watchos26 -### -c %s 2>&1 | FileCheck %s --check-prefix=S6
10+
11+
/// arm64 is new in watchOS 26, and defaults to apple-s6.
12+
// RUN: %clang -target arm64-apple-watchos26 -### -c %s 2>&1 | FileCheck %s --check-prefix=S6
13+
14+
/// llvm usually treats tvOS like iOS, but it runs on different hardware.
15+
// RUN: %clang -target arm64-apple-tvos26 -### -c %s 2>&1 | FileCheck %s --check-prefix=A7
16+
// RUN: %clang -target arm64e-apple-tvos26 -### -c %s 2>&1 | FileCheck %s --check-prefix=A12
17+
18+
/// Simulators are tested with other Mac-like targets in aarch64-mac-cpus.c.
19+
20+
// A12: "-target-cpu" "apple-a12"
21+
// S6: "-target-cpu" "apple-s6"
22+
// A7: "-target-cpu" "apple-a7"

‎clang/test/Driver/aarch64-mac-cpus.c‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,4 @@
1-
// arm64 Mac-based targets default to Apple A13.
1+
// arm64/arm64e Mac-based targets default to Apple M1.
22

33
// RUN: %clang --target=arm64-apple-macos -### -c %s 2>&1 | FileCheck %s
44
// RUN: %clang --target=arm64-apple-ios-macabi -### -c %s 2>&1 | FileCheck %s

‎lld/ELF/Arch/AArch64.cpp‎

Lines changed: 12 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -154,6 +154,12 @@ RelExpr AArch64::getRelExpr(RelType type, const Symbol &s,
154154
case R_AARCH64_MOVW_UABS_G2_NC:
155155
case R_AARCH64_MOVW_UABS_G3:
156156
return R_ABS;
157+
case R_AARCH64_PATCHINST:
158+
if (!isAbsolute(s))
159+
Err(ctx) << getErrorLoc(ctx, loc)
160+
<< "R_AARCH64_PATCHINST relocation against non-absolute symbol "
161+
<< &s;
162+
return R_ABS;
157163
case R_AARCH64_AUTH_ABS64:
158164
return RE_AARCH64_AUTH;
159165
case R_AARCH64_TLSDESC_ADR_PAGE21:
@@ -506,6 +512,12 @@ void AArch64::relocate(uint8_t *loc, const Relocation &rel,
506512
checkIntUInt(ctx, loc, val, 32, rel);
507513
write32(ctx, loc, val);
508514
break;
515+
case R_AARCH64_PATCHINST:
516+
if (!rel.sym->isUndefined()) {
517+
checkUInt(ctx, loc, val, 32, rel);
518+
write32le(loc, val);
519+
}
520+
break;
509521
case R_AARCH64_PLT32:
510522
case R_AARCH64_GOTPCREL32:
511523
checkInt(ctx, loc, val, 32, rel);

‎lld/ELF/Relocations.cpp‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -176,7 +176,7 @@ static RelType getMipsPairType(RelType type, bool isLocal) {
176176

177177
// True if non-preemptable symbol always has the same value regardless of where
178178
// the DSO is loaded.
179-
static bool isAbsolute(const Symbol &sym) {
179+
bool elf::isAbsolute(const Symbol &sym) {
180180
if (sym.isUndefined())
181181
return true;
182182
if (const auto *dr = dyn_cast<Defined>(&sym))

‎lld/ELF/Relocations.h‎

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -165,6 +165,8 @@ void addGotEntry(Ctx &ctx, Symbol &sym);
165165
void hexagonTLSSymbolUpdate(Ctx &ctx);
166166
bool hexagonNeedsTLSSymbol(ArrayRef<OutputSection *> outputSections);
167167

168+
bool isAbsolute(const Symbol &sym);
169+
168170
class ThunkSection;
169171
class Thunk;
170172
class InputSectionDescription;

‎lld/test/ELF/aarch64-patchinst.s‎

Lines changed: 87 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,87 @@
1+
# RUN: rm -rf %t && split-file %s %t
2+
# RUN: llvm-mc -filetype=obj -triple=aarch64 %t/use.s -o %t/use-le.o
3+
# RUN: llvm-mc -filetype=obj -triple=aarch64 %t/def.s -o %t/def-le.o
4+
# RUN: llvm-mc -filetype=obj -triple=aarch64 %t/rel.s -o %t/rel-le.o
5+
6+
## Deactivation symbol used without being defined: instruction emitted as usual.
7+
# RUN: ld.lld -o %t/undef-le %t/use-le.o --emit-relocs
8+
# RUN: llvm-objdump -r %t/undef-le | FileCheck --check-prefix=RELOC %s
9+
# RUN: llvm-objdump -d %t/undef-le | FileCheck --check-prefix=UNDEF %s
10+
# RUN: ld.lld -pie -o %t/undef-le %t/use-le.o --emit-relocs
11+
# RUN: llvm-objdump -r %t/undef-le | FileCheck --check-prefix=RELOC %s
12+
# RUN: llvm-objdump -d %t/undef-le | FileCheck --check-prefix=UNDEF %s
13+
14+
## Deactivation symbol defined: instructions overwritten with NOPs.
15+
# RUN: ld.lld -o %t/def-le %t/use-le.o %t/def-le.o --emit-relocs
16+
# RUN: llvm-objdump -r %t/def-le | FileCheck --check-prefix=RELOC %s
17+
# RUN: llvm-objdump -d %t/def-le | FileCheck --check-prefix=DEF %s
18+
# RUN: ld.lld -pie -o %t/def-le %t/use-le.o %t/def-le.o --emit-relocs
19+
# RUN: llvm-objdump -r %t/def-le | FileCheck --check-prefix=RELOC %s
20+
# RUN: llvm-objdump -d %t/def-le | FileCheck --check-prefix=DEF %s
21+
22+
## Relocation pointing to a non-SHN_UNDEF non-SHN_ABS symbol is an error.
23+
# RUN: not ld.lld -o %t/rel-le %t/use-le.o %t/rel-le.o 2>&1 | FileCheck --check-prefix=ERROR %s
24+
# RUN: not ld.lld -pie -o %t/rel-le %t/use-le.o %t/rel-le.o 2>&1 | FileCheck --check-prefix=ERROR %s
25+
26+
## Behavior unchanged by endianness: relocation always written as little endian.
27+
# RUN: llvm-mc -filetype=obj -triple=aarch64_be %t/use.s -o %t/use-be.o
28+
# RUN: llvm-mc -filetype=obj -triple=aarch64_be %t/def.s -o %t/def-be.o
29+
# RUN: llvm-mc -filetype=obj -triple=aarch64_be %t/rel.s -o %t/rel-be.o
30+
# RUN: ld.lld -o %t/undef-be %t/use-be.o --emit-relocs
31+
# RUN: llvm-objdump -r %t/undef-be | FileCheck --check-prefix=RELOC %s
32+
# RUN: llvm-objdump -d %t/undef-be | FileCheck --check-prefix=UNDEF %s
33+
# RUN: ld.lld -pie -o %t/undef-be %t/use-be.o --emit-relocs
34+
# RUN: llvm-objdump -r %t/undef-be | FileCheck --check-prefix=RELOC %s
35+
# RUN: llvm-objdump -d %t/undef-be | FileCheck --check-prefix=UNDEF %s
36+
# RUN: ld.lld -o %t/def-be %t/use-be.o %t/def-be.o --emit-relocs
37+
# RUN: llvm-objdump -r %t/def-be | FileCheck --check-prefix=RELOC %s
38+
# RUN: llvm-objdump -d %t/def-be | FileCheck --check-prefix=DEF %s
39+
# RUN: ld.lld -pie -o %t/def-be %t/use-be.o %t/def-be.o --emit-relocs
40+
# RUN: llvm-objdump -r %t/def-be | FileCheck --check-prefix=RELOC %s
41+
# RUN: llvm-objdump -d %t/def-be | FileCheck --check-prefix=DEF %s
42+
# RUN: not ld.lld -o %t/rel-be %t/use-be.o %t/rel-be.o 2>&1 | FileCheck --check-prefix=ERROR %s
43+
# RUN: not ld.lld -pie -o %t/rel-be %t/use-be.o %t/rel-be.o 2>&1 | FileCheck --check-prefix=ERROR %s
44+
45+
# RELOC: R_AARCH64_JUMP26
46+
# RELOC-NEXT: R_AARCH64_PATCHINST ds
47+
# RELOC-NEXT: R_AARCH64_PATCHINST ds
48+
# RELOC-NEXT: R_AARCH64_PATCHINST ds0+0xd503201f
49+
50+
#--- use.s
51+
.weak ds
52+
.weak ds0
53+
# This instruction has a single relocation: the DS relocation.
54+
# UNDEF: add x0, x1, x2
55+
# DEF: nop
56+
# ERROR: R_AARCH64_PATCHINST relocation against non-absolute symbol ds
57+
.reloc ., R_AARCH64_PATCHINST, ds
58+
add x0, x1, x2
59+
# This instruction has two relocations: the DS relocation and the JUMP26 to f1.
60+
# Make sure that the DS relocation takes precedence.
61+
.reloc ., R_AARCH64_PATCHINST, ds
62+
# UNDEF: b {{.*}} <f1>
63+
# DEF: nop
64+
# ERROR: R_AARCH64_PATCHINST relocation against non-absolute symbol ds
65+
b f1
66+
# Alternative representation: instruction opcode stored in addend.
67+
# UNDEF: add x3, x4, x5
68+
# DEF: nop
69+
# ERROR: R_AARCH64_PATCHINST relocation against non-absolute symbol ds0
70+
.reloc ., R_AARCH64_PATCHINST, ds0 + 0xd503201f
71+
add x3, x4, x5
72+
73+
.section .text.f1,"ax",@progbits
74+
f1:
75+
ret
76+
77+
#--- def.s
78+
.globl ds
79+
ds = 0xd503201f
80+
.globl ds0
81+
ds0 = 0
82+
83+
#--- rel.s
84+
.globl ds
85+
ds:
86+
.globl ds0
87+
ds0:

‎llvm/include/llvm/BinaryFormat/ELFRelocs/AArch64.def‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -61,6 +61,7 @@ ELF_RELOC(R_AARCH64_LD64_GOT_LO12_NC, 0x138)
6161
ELF_RELOC(R_AARCH64_LD64_GOTPAGE_LO15, 0x139)
6262
ELF_RELOC(R_AARCH64_PLT32, 0x13a)
6363
ELF_RELOC(R_AARCH64_GOTPCREL32, 0x13b)
64+
ELF_RELOC(R_AARCH64_PATCHINST, 0x13c)
6465
// General dynamic TLS relocations
6566
ELF_RELOC(R_AARCH64_TLSGD_ADR_PREL21, 0x200)
6667
ELF_RELOC(R_AARCH64_TLSGD_ADR_PAGE21, 0x201)

‎llvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFObjectWriter.cpp‎

Lines changed: 12 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -40,6 +40,7 @@ class AArch64ELFObjectWriter : public MCELFObjectTargetWriter {
4040
bool IsPCRel) const override;
4141
bool needsRelocateWithSymbol(const MCValue &, unsigned Type) const override;
4242
bool isNonILP32reloc(const MCFixup &Fixup, AArch64::Specifier RefKind) const;
43+
void sortRelocs(std::vector<ELFRelocationEntry> &Relocs) override;
4344

4445
bool IsILP32;
4546
};
@@ -498,6 +499,17 @@ bool AArch64ELFObjectWriter::needsRelocateWithSymbol(const MCValue &Val,
498499
Val.getSpecifier());
499500
}
500501

502+
void AArch64ELFObjectWriter::sortRelocs(
503+
std::vector<ELFRelocationEntry> &Relocs) {
504+
// PATCHINST relocations should be applied last because they may overwrite the
505+
// whole instruction and so should take precedence over other relocations that
506+
// modify operands of the original instruction.
507+
std::stable_partition(Relocs.begin(), Relocs.end(),
508+
[](const ELFRelocationEntry &R) {
509+
return R.Type != ELF::R_AARCH64_PATCHINST;
510+
});
511+
}
512+
501513
std::unique_ptr<MCObjectTargetWriter>
502514
llvm::createAArch64ELFObjectWriter(uint8_t OSABI, bool IsILP32) {
503515
return std::make_unique<AArch64ELFObjectWriter>(OSABI, IsILP32);

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