[AMDGPU][NewPM] Port AMDGPUMarkLastScratchLoad to NPM

Author: optimisan

llvm/lib/Target/AMDGPU/AMDGPU.h

@@ -195,8 +195,8 @@ extern char &AMDGPURegBankSelectID;
 void initializeAMDGPURegBankLegalizePass(PassRegistry &);
 extern char &AMDGPURegBankLegalizeID;
 
-void initializeAMDGPUMarkLastScratchLoadPass(PassRegistry &);
-extern char &AMDGPUMarkLastScratchLoadID;
+void initializeAMDGPUMarkLastScratchLoadLegacyPass(PassRegistry &);
+extern char &AMDGPUMarkLastScratchLoadLegacyID;
 
 void initializeSILowerSGPRSpillsLegacyPass(PassRegistry &);
 extern char &SILowerSGPRSpillsLegacyID;

llvm/lib/Target/AMDGPU/AMDGPUMarkLastScratchLoad.cpp

@@ -13,6 +13,7 @@
 //
 //===----------------------------------------------------------------------===//
 
+#include "AMDGPUMarkLastScratchLoad.h"
 #include "AMDGPU.h"
 #include "GCNSubtarget.h"
 #include "llvm/CodeGen/LiveIntervals.h"
@@ -25,18 +26,26 @@ using namespace llvm;
 
 namespace {
 
-class AMDGPUMarkLastScratchLoad : public MachineFunctionPass {
+class AMDGPUMarkLastScratchLoad {
 private:
   LiveStacks *LS = nullptr;
   LiveIntervals *LIS = nullptr;
   SlotIndexes *SI = nullptr;
   const SIInstrInfo *SII = nullptr;
 
+public:
+  AMDGPUMarkLastScratchLoad(LiveStacks *LS, LiveIntervals *LIS, SlotIndexes *SI)
+      : LS(LS), LIS(LIS), SI(SI) {}
+  bool run(MachineFunction &MF);
+};
+
+class AMDGPUMarkLastScratchLoadLegacy : public MachineFunctionPass {
 public:
   static char ID;
 
-  AMDGPUMarkLastScratchLoad() : MachineFunctionPass(ID) {
-    initializeAMDGPUMarkLastScratchLoadPass(*PassRegistry::getPassRegistry());
+  AMDGPUMarkLastScratchLoadLegacy() : MachineFunctionPass(ID) {
+    initializeAMDGPUMarkLastScratchLoadLegacyPass(
+        *PassRegistry::getPassRegistry());
   }
 
   bool runOnMachineFunction(MachineFunction &MF) override;
@@ -56,17 +65,33 @@ class AMDGPUMarkLastScratchLoad : public MachineFunctionPass {
 
 } // end anonymous namespace
 
-bool AMDGPUMarkLastScratchLoad::runOnMachineFunction(MachineFunction &MF) {
+bool AMDGPUMarkLastScratchLoadLegacy::runOnMachineFunction(
+    MachineFunction &MF) {
   if (skipFunction(MF.getFunction()))
     return false;
+  auto *LS = &getAnalysis<LiveStacksWrapperLegacy>().getLS();
+  auto *LIS = &getAnalysis<LiveIntervalsWrapperPass>().getLIS();
+  auto *SI = &getAnalysis<SlotIndexesWrapperPass>().getSI();
+
+  return AMDGPUMarkLastScratchLoad(LS, LIS, SI).run(MF);
+}
+
+PreservedAnalyses
+AMDGPUMarkLastScratchLoadPass::run(MachineFunction &MF,
+                                   MachineFunctionAnalysisManager &MFAM) {
+  auto *LS = &MFAM.getResult<LiveStacksAnalysis>(MF);
+  auto *LIS = &MFAM.getResult<LiveIntervalsAnalysis>(MF);
+  auto *SI = &MFAM.getResult<SlotIndexesAnalysis>(MF);
+
+  AMDGPUMarkLastScratchLoad(LS, LIS, SI).run(MF);
+  return PreservedAnalyses::all();
+}
 
+bool AMDGPUMarkLastScratchLoad::run(MachineFunction &MF) {
   const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>();
   if (ST.getGeneration() < AMDGPUSubtarget::GFX12)
     return false;
 
-  LS = &getAnalysis<LiveStacksWrapperLegacy>().getLS();
-  LIS = &getAnalysis<LiveIntervalsWrapperPass>().getLIS();
-  SI = &getAnalysis<SlotIndexesWrapperPass>().getSI();
   SII = ST.getInstrInfo();
   SlotIndexes &Slots = *LIS->getSlotIndexes();
 
@@ -130,13 +155,14 @@ bool AMDGPUMarkLastScratchLoad::runOnMachineFunction(MachineFunction &MF) {
   return Changed;
 }
 
-char AMDGPUMarkLastScratchLoad::ID = 0;
+char AMDGPUMarkLastScratchLoadLegacy::ID = 0;
 
-char &llvm::AMDGPUMarkLastScratchLoadID = AMDGPUMarkLastScratchLoad::ID;
+char &llvm::AMDGPUMarkLastScratchLoadLegacyID =
+    AMDGPUMarkLastScratchLoadLegacy::ID;
 
-INITIALIZE_PASS_BEGIN(AMDGPUMarkLastScratchLoad, DEBUG_TYPE,
+INITIALIZE_PASS_BEGIN(AMDGPUMarkLastScratchLoadLegacy, DEBUG_TYPE,
                       "AMDGPU Mark last scratch load", false, false)
 INITIALIZE_PASS_DEPENDENCY(SlotIndexesWrapperPass)
 INITIALIZE_PASS_DEPENDENCY(LiveStacksWrapperLegacy)
-INITIALIZE_PASS_END(AMDGPUMarkLastScratchLoad, DEBUG_TYPE,
+INITIALIZE_PASS_END(AMDGPUMarkLastScratchLoadLegacy, DEBUG_TYPE,
                     "AMDGPU Mark last scratch load", false, false)

llvm/lib/Target/AMDGPU/AMDGPUMarkLastScratchLoad.h

@@ -0,0 +1,23 @@
+//===- AMDGPUMarkLastScratchLoad.h ------------------------------*- C++- *-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef LLVM_LIB_TARGET_AMDGPU_AMDGPUMARKLASTSCRATCHLOAD_H
+#define LLVM_LIB_TARGET_AMDGPU_AMDGPUMARKLASTSCRATCHLOAD_H
+
+#include "llvm/CodeGen/MachinePassManager.h"
+
+namespace llvm {
+class AMDGPUMarkLastScratchLoadPass
+    : public PassInfoMixin<AMDGPUMarkLastScratchLoadPass> {
+public:
+  PreservedAnalyses run(MachineFunction &MF,
+                        MachineFunctionAnalysisManager &MFAM);
+};
+} // namespace llvm
+
+#endif // LLVM_LIB_TARGET_AMDGPU_AMDGPUMARKLASTSCRATCHLOAD_H

llvm/lib/Target/AMDGPU/AMDGPUPassRegistry.def

@@ -97,6 +97,7 @@ FUNCTION_PASS_WITH_PARAMS(
 #define MACHINE_FUNCTION_PASS(NAME, CREATE_PASS)
 #endif
 MACHINE_FUNCTION_PASS("amdgpu-isel", AMDGPUISelDAGToDAGPass(*this))
+MACHINE_FUNCTION_PASS("amdgpu-mark-last-scratch-load", AMDGPUMarkLastScratchLoadPass())
 MACHINE_FUNCTION_PASS("si-fix-sgpr-copies", SIFixSGPRCopiesPass())
 MACHINE_FUNCTION_PASS("si-i1-copies", SILowerI1CopiesPass())
 MACHINE_FUNCTION_PASS("si-fix-vgpr-copies", SIFixVGPRCopiesPass())

llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp

@@ -22,6 +22,7 @@
 #include "AMDGPUIGroupLP.h"
 #include "AMDGPUISelDAGToDAG.h"
 #include "AMDGPUMacroFusion.h"
+#include "AMDGPUMarkLastScratchLoad.h"
 #include "AMDGPUOpenCLEnqueuedBlockLowering.h"
 #include "AMDGPUPerfHintAnalysis.h"
 #include "AMDGPURemoveIncompatibleFunctions.h"
@@ -484,7 +485,7 @@ extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeAMDGPUTarget() {
   initializeAMDGPURegBankSelectPass(*PR);
   initializeAMDGPURegBankLegalizePass(*PR);
   initializeSILowerWWMCopiesPass(*PR);
-  initializeAMDGPUMarkLastScratchLoadPass(*PR);
+  initializeAMDGPUMarkLastScratchLoadLegacyPass(*PR);
   initializeSILowerSGPRSpillsLegacyPass(*PR);
   initializeSIFixSGPRCopiesLegacyPass(*PR);
   initializeSIFixVGPRCopiesLegacyPass(*PR);
@@ -1628,7 +1629,7 @@ bool GCNPassConfig::addRegAssignAndRewriteOptimized() {
   addPreRewrite();
   addPass(&VirtRegRewriterID);
 
-  addPass(&AMDGPUMarkLastScratchLoadID);
+  addPass(&AMDGPUMarkLastScratchLoadLegacyID);
 
   return true;
 }

llvm/test/CodeGen/AMDGPU/live-interval-bug-in-rename-independent-subregs.mir

@@ -1,6 +1,7 @@
 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 4
 # RUN: llc -mtriple=amdgcn--amdpal -mcpu=gfx1010 -start-before=rename-independent-subregs -mattr=+wavefrontsize64 -stop-before=amdgpu-mark-last-scratch-load %s -o - | FileCheck -check-prefix=REG_ALLOC %s
 # RUN: llc -mtriple=amdgcn--amdpal -mcpu=gfx1010 -start-before=rename-independent-subregs -mattr=+wavefrontsize64 -stop-after=machine-cp %s -o - | FileCheck -check-prefix=DEAD_INST_DEL %s
+# TODO: add test for NPM once RA is ported
 
 ---
 name: _amdgpu_cs_main

llvm/test/CodeGen/AMDGPU/vgpr-mark-last-scratch-load.mir

@@ -1,5 +1,6 @@
 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 3
 # RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1200 -o - %s -run-pass=greedy -run-pass=amdgpu-mark-last-scratch-load -verify-machineinstrs | FileCheck -check-prefix=CHECK %s
+# TODO: Add test for NPM once Greedy is ported.
 
 --- |
   define amdgpu_cs void @test_spill_12x32() "amdgpu-num-vgpr"="12" {