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[VPlan] Use RPOT for VPlan codegen and printing.
This split off changes for more complex CFGs in VPlan from both #114292 #112138 This simplifies their respective diffs.
1 parent 4b24ab4 commit 6797b0f

16 files changed

+171
-169
lines changed

‎llvm/lib/Transforms/Vectorize/VPlan.cpp‎

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1139,7 +1139,9 @@ void VPlan::print(raw_ostream &O) const {
11391139
getPreheader()->print(O, "", SlotTracker);
11401140
}
11411141

1142-
for (const VPBlockBase *Block : vp_depth_first_shallow(getEntry())) {
1142+
ReversePostOrderTraversal<VPBlockShallowTraversalWrapper<const VPBlockBase *>>
1143+
RPOT(getEntry());
1144+
for (const VPBlockBase *Block : RPOT) {
11431145
O << '\n';
11441146
Block->print(O, "", SlotTracker);
11451147
}

‎llvm/test/Transforms/LoopVectorize/AArch64/sve2-histcnt-vplan.ll‎

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -41,16 +41,16 @@ target triple = "aarch64-unknown-linux-gnu"
4141
; CHECK-NEXT: EMIT branch-on-cond [[TC_CHECK]]
4242
; CHECK-NEXT: Successor(s): ir-bb<for.exit>, scalar.ph
4343
; CHECK-EMPTY:
44-
; CHECK-NEXT: ir-bb<for.exit>:
45-
; CHECK-NEXT: No successors
46-
; CHECK-EMPTY:
4744
; CHECK-NEXT: scalar.ph:
4845
; CHECK-NEXT: Successor(s): ir-bb<for.body>
4946
; CHECK-EMPTY:
5047
; CHECK-NEXT: ir-bb<for.body>:
5148
; CHECK-NEXT: IR %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
5249
; CHECK: IR %exitcond = icmp eq i64 %iv.next, %N
5350
; CHECK-NEXT: No successors
51+
; CHECK-EMPTY:
52+
; CHECK-NEXT: ir-bb<for.exit>:
53+
; CHECK-NEXT: No successors
5454
; CHECK-NEXT: }
5555

5656
;; Check that the vectorized plan contains a histogram recipe instead.
@@ -83,16 +83,16 @@ target triple = "aarch64-unknown-linux-gnu"
8383
; CHECK-NEXT: EMIT branch-on-cond [[TC_CHECK]]
8484
; CHECK-NEXT: Successor(s): ir-bb<for.exit>, scalar.ph
8585
; CHECK-EMPTY:
86-
; CHECK-NEXT: ir-bb<for.exit>:
87-
; CHECK-NEXT: No successors
88-
; CHECK-EMPTY:
8986
; CHECK-NEXT: scalar.ph:
9087
; CHECK-NEXT: Successor(s): ir-bb<for.body>
9188
; CHECK-EMPTY:
9289
; CHECK-NEXT: ir-bb<for.body>:
9390
; CHECK-NEXT: IR %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
9491
; CHECK: IR %exitcond = icmp eq i64 %iv.next, %N
9592
; CHECK-NEXT: No successors
93+
; CHECK-EMPTY:
94+
; CHECK-NEXT: ir-bb<for.exit>:
95+
; CHECK-NEXT: No successors
9696
; CHECK-NEXT: }
9797

9898
define void @simple_histogram(ptr noalias %buckets, ptr readonly %indices, i64 %N) {

‎llvm/test/Transforms/LoopVectorize/AArch64/synthesize-mask-for-call.ll‎

Lines changed: 18 additions & 18 deletions
Original file line numberDiff line numberDiff line change
@@ -39,16 +39,16 @@ target triple = "aarch64-unknown-linux-gnu"
3939
; CHECK-NEXT: EMIT branch-on-cond vp<[[CMP]]>
4040
; CHECK-NEXT: Successor(s): ir-bb<for.cond.cleanup>, scalar.ph
4141
; CHECK-EMPTY:
42-
; CHECK-NEXT: ir-bb<for.cond.cleanup>:
43-
; CHECK-NEXT: No successors
44-
; CHECK-EMPTY:
4542
; CHECK-NEXT: scalar.ph:
4643
; CHECK-NEXT: Successor(s): ir-bb<for.body>
4744
; CHECK-EMPTY:
4845
; CHECK-NEXT: ir-bb<for.body>:
4946
; CHECK-NEXT: IR %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
5047
; CHECK: IR %exitcond = icmp eq i64 %indvars.iv.next, 1024
5148
; CHECK-NEXT: No successors
49+
; CHECK-EMPTY:
50+
; CHECK-NEXT: ir-bb<for.cond.cleanup>:
51+
; CHECK-NEXT: No successors
5252
; CHECK-NEXT: }
5353

5454
; CHECK: VPlan 'Initial VPlan for VF={4},UF>=1' {
@@ -81,16 +81,16 @@ target triple = "aarch64-unknown-linux-gnu"
8181
; CHECK-NEXT: EMIT branch-on-cond vp<[[CMP]]>
8282
; CHECK-NEXT: Successor(s): ir-bb<for.cond.cleanup>, scalar.ph
8383
; CHECK-EMPTY:
84-
; CHECK-NEXT: ir-bb<for.cond.cleanup>:
85-
; CHECK-NEXT: No successors
86-
; CHECK-EMPTY:
8784
; CHECK-NEXT: scalar.ph:
8885
; CHECK-NEXT: Successor(s): ir-bb<for.body>
8986
; CHECK-EMPTY:
9087
; CHECK-NEXT: ir-bb<for.body>:
9188
; CHECK-NEXT: IR %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
9289
; CHECK: IR %exitcond = icmp eq i64 %indvars.iv.next, 1024
9390
; CHECK-NEXT: No successors
91+
; CHECK-EMPTY:
92+
; CHECK-NEXT: ir-bb<for.cond.cleanup>:
93+
; CHECK-NEXT: No successors
9494
; CHECK-NEXT: }
9595

9696
;; If we have a masked variant at one VF and an unmasked variant at a different
@@ -128,16 +128,16 @@ target triple = "aarch64-unknown-linux-gnu"
128128
; CHECK-NEXT: EMIT branch-on-cond vp<[[CMP]]>
129129
; CHECK-NEXT: Successor(s): ir-bb<for.cond.cleanup>, scalar.ph
130130
; CHECK-EMPTY:
131-
; CHECK-NEXT: ir-bb<for.cond.cleanup>:
132-
; CHECK-NEXT: No successors
133-
; CHECK-EMPTY:
134131
; CHECK-NEXT: scalar.ph:
135132
; CHECK-NEXT: Successor(s): ir-bb<for.body>
136133
; CHECK-EMPTY:
137134
; CHECK-NEXT: ir-bb<for.body>:
138135
; CHECK-NEXT: IR %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
139136
; CHECK: IR %exitcond = icmp eq i64 %indvars.iv.next, 1024
140137
; CHECK-NEXT: No successors
138+
; CHECK-EMPTY:
139+
; CHECK-NEXT: ir-bb<for.cond.cleanup>:
140+
; CHECK-NEXT: No successors
141141
; CHECK-NEXT: }
142142

143143
; CHECK: VPlan 'Initial VPlan for VF={4},UF>=1' {
@@ -170,16 +170,16 @@ target triple = "aarch64-unknown-linux-gnu"
170170
; CHECK-NEXT: EMIT branch-on-cond vp<[[CMP]]>
171171
; CHECK-NEXT: Successor(s): ir-bb<for.cond.cleanup>, scalar.ph
172172
; CHECK-EMPTY:
173-
; CHECK-NEXT: ir-bb<for.cond.cleanup>:
174-
; CHECK-NEXT: No successors
175-
; CHECK-EMPTY:
176173
; CHECK-NEXT: scalar.ph:
177174
; CHECK-NEXT: Successor(s): ir-bb<for.body>
178175
; CHECK-EMPTY:
179176
; CHECK-NEXT: ir-bb<for.body>:
180177
; CHECK-NEXT: IR %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
181178
; CHECK: IR %exitcond = icmp eq i64 %indvars.iv.next, 1024
182179
; CHECK-NEXT: No successors
180+
; CHECK-EMPTY:
181+
; CHECK-NEXT: ir-bb<for.cond.cleanup>:
182+
; CHECK-NEXT: No successors
183183
; CHECK-NEXT: }
184184

185185
;; If we have two variants at different VFs, neither of which are masked, we
@@ -216,16 +216,16 @@ target triple = "aarch64-unknown-linux-gnu"
216216
; CHECK-NEXT: EMIT branch-on-cond vp<[[CMP]]>
217217
; CHECK-NEXT: Successor(s): ir-bb<for.cond.cleanup>, scalar.ph
218218
; CHECK-EMPTY:
219-
; CHECK-NEXT: ir-bb<for.cond.cleanup>:
220-
; CHECK-NEXT: No successors
221-
; CHECK-EMPTY:
222219
; CHECK-NEXT: scalar.ph:
223220
; CHECK-NEXT: Successor(s): ir-bb<for.body>
224221
; CHECK-EMPTY:
225222
; CHECK-NEXT: ir-bb<for.body>:
226223
; CHECK-NEXT: IR %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
227224
; CHECK: IR %exitcond = icmp eq i64 %indvars.iv.next, 1024
228225
; CHECK-NEXT: No successors
226+
; CHECK-EMPTY:
227+
; CHECK-NEXT: ir-bb<for.cond.cleanup>:
228+
; CHECK-NEXT: No successors
229229
; CHECK-NEXT: }
230230

231231
; CHECK: VPlan 'Initial VPlan for VF={4},UF>=1' {
@@ -258,16 +258,16 @@ target triple = "aarch64-unknown-linux-gnu"
258258
; CHECK-NEXT: EMIT branch-on-cond vp<[[CMP]]>
259259
; CHECK-NEXT: Successor(s): ir-bb<for.cond.cleanup>, scalar.ph
260260
; CHECK-EMPTY:
261-
; CHECK-NEXT: ir-bb<for.cond.cleanup>:
262-
; CHECK-NEXT: No successors
263-
; CHECK-EMPTY:
264261
; CHECK-NEXT: scalar.ph:
265262
; CHECK-NEXT: Successor(s): ir-bb<for.body>
266263
; CHECK-EMPTY:
267264
; CHECK-NEXT: ir-bb<for.body>:
268265
; CHECK-NEXT: IR %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
269266
; CHECK: IR %exitcond = icmp eq i64 %indvars.iv.next, 1024
270267
; CHECK-NEXT: No successors
268+
; CHECK-EMPTY:
269+
; CHECK-NEXT: ir-bb<for.cond.cleanup>:
270+
; CHECK-NEXT: No successors
271271
; CHECK-NEXT: }
272272

273273
define void @test_v4_v4m(ptr noalias %a, ptr readonly %b) #3 {

‎llvm/test/Transforms/LoopVectorize/AArch64/widen-call-with-intrinsic-or-libfunc.ll‎

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -37,16 +37,16 @@ target triple = "arm64-apple-ios"
3737
; CHECK-NEXT: EMIT branch-on-cond vp<[[CMP]]>
3838
; CHECK-NEXT: Successor(s): ir-bb<exit>, scalar.ph
3939
; CHECK-EMPTY:
40-
; CHECK-NEXT: ir-bb<exit>:
41-
; CHECK-NEXT: No successors
42-
; CHECK-EMPTY:
4340
; CHECK-NEXT: scalar.ph:
4441
; CHECK-NEXT: Successor(s): ir-bb<loop>
4542
; CHECK-EMPTY:
4643
; CHECK-NEXT: ir-bb<loop>:
4744
; CHECK-NEXT: IR %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]
4845
; CHECK: IR %cmp = icmp ne i64 %iv.next, 1024
4946
; CHECK-NEXT: No successors
47+
; CHECK-EMPTY:
48+
; CHECK-NEXT: ir-bb<exit>:
49+
; CHECK-NEXT: No successors
5050
; CHECK-NEXT: }
5151

5252
; CHECK: VPlan 'Initial VPlan for VF={4},UF>=1' {
@@ -79,16 +79,16 @@ target triple = "arm64-apple-ios"
7979
; CHECK-NEXT: EMIT branch-on-cond vp<[[CMP]]>
8080
; CHECK-NEXT: Successor(s): ir-bb<exit>, scalar.ph
8181
; CHECK-EMPTY:
82-
; CHECK-NEXT: ir-bb<exit>:
83-
; CHECK-NEXT: No successors
84-
; CHECK-EMPTY:
8582
; CHECK-NEXT: scalar.ph:
8683
; CHECK-NEXT: Successor(s): ir-bb<loop>
8784
; CHECK-EMPTY:
8885
; CHECK-NEXT: ir-bb<loop>:
8986
; CHECK-NEXT: IR %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]
9087
; CHECK: IR %cmp = icmp ne i64 %iv.next, 1024
9188
; CHECK-NEXT: No successors
89+
; CHECK-EMPTY:
90+
; CHECK-NEXT: ir-bb<exit>:
91+
; CHECK-NEXT: No successors
9292
; CHECK-NEXT: }
9393
;
9494
;

‎llvm/test/Transforms/LoopVectorize/RISCV/riscv-vector-reverse.ll‎

Lines changed: 12 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -91,9 +91,6 @@ define void @vector_reverse_i64(ptr nocapture noundef writeonly %A, ptr nocaptur
9191
; CHECK-NEXT: EMIT branch-on-cond vp<[[CMP]]>
9292
; CHECK-NEXT: Successor(s): ir-bb<for.cond.cleanup.loopexit>, scalar.ph
9393
; CHECK-EMPTY:
94-
; CHECK-NEXT: ir-bb<for.cond.cleanup.loopexit>:
95-
; CHECK-NEXT: No successors
96-
; CHECK-EMPTY:
9794
; CHECK-NEXT: scalar.ph:
9895
; CHECK-NEXT: Successor(s): ir-bb<for.body>
9996
; CHECK-EMPTY:
@@ -102,6 +99,9 @@ define void @vector_reverse_i64(ptr nocapture noundef writeonly %A, ptr nocaptur
10299
; CHECK-NEXT: IR %i.0.in8 = phi i32 [ %n, %for.body.preheader ], [ %i.0, %for.body ]
103100
; CHECK: IR %indvars.iv.next = add nsw i64 %indvars.iv, -1
104101
; CHECK-NEXT: No successors
102+
; CHECK-EMPTY:
103+
; CHECK-NEXT: ir-bb<for.cond.cleanup.loopexit>:
104+
; CHECK-NEXT: No successors
105105
; CHECK-NEXT: }
106106
; CHECK-NEXT: LV: Found an estimated cost of 0 for VF vscale x 4 For instruction: %indvars.iv = phi i64 [ %0, %for.body.preheader ], [ %indvars.iv.next, %for.body ]
107107
; CHECK-NEXT: LV: Found an estimated cost of 0 for VF vscale x 4 For instruction: %i.0.in8 = phi i32 [ %n, %for.body.preheader ], [ %i.0, %for.body ]
@@ -182,9 +182,6 @@ define void @vector_reverse_i64(ptr nocapture noundef writeonly %A, ptr nocaptur
182182
; CHECK-NEXT: EMIT branch-on-cond vp<[[CMP]]>
183183
; CHECK-NEXT: Successor(s): ir-bb<for.cond.cleanup.loopexit>, scalar.ph
184184
; CHECK-EMPTY:
185-
; CHECK-NEXT: ir-bb<for.cond.cleanup.loopexit>:
186-
; CHECK-NEXT: No successors
187-
; CHECK-EMPTY:
188185
; CHECK-NEXT: scalar.ph:
189186
; CHECK-NEXT: Successor(s): ir-bb<for.body>
190187
; CHECK-EMPTY:
@@ -193,6 +190,9 @@ define void @vector_reverse_i64(ptr nocapture noundef writeonly %A, ptr nocaptur
193190
; CHECK-NEXT: IR %i.0.in8 = phi i32 [ %n, %for.body.preheader ], [ %i.0, %for.body ]
194191
; CHECK: IR %indvars.iv.next = add nsw i64 %indvars.iv, -1
195192
; CHECK-NEXT: No successors
193+
; CHECK-EMPTY:
194+
; CHECK-NEXT: ir-bb<for.cond.cleanup.loopexit>:
195+
; CHECK-NEXT: No successors
196196
; CHECK-NEXT: }
197197
; CHECK: LV: Loop does not require scalar epilogue
198198
;
@@ -305,9 +305,6 @@ define void @vector_reverse_f32(ptr nocapture noundef writeonly %A, ptr nocaptur
305305
; CHECK-NEXT: EMIT branch-on-cond vp<[[CMP]]>
306306
; CHECK-NEXT: Successor(s): ir-bb<for.cond.cleanup.loopexit>, scalar.ph
307307
; CHECK-EMPTY:
308-
; CHECK-NEXT: ir-bb<for.cond.cleanup.loopexit>:
309-
; CHECK-NEXT: No successors
310-
; CHECK-EMPTY:
311308
; CHECK-NEXT: scalar.ph:
312309
; CHECK-NEXT: Successor(s): ir-bb<for.body>
313310
; CHECK-EMPTY:
@@ -316,6 +313,9 @@ define void @vector_reverse_f32(ptr nocapture noundef writeonly %A, ptr nocaptur
316313
; CHECK-NEXT: IR %i.0.in8 = phi i32 [ %n, %for.body.preheader ], [ %i.0, %for.body ]
317314
; CHECK: IR %indvars.iv.next = add nsw i64 %indvars.iv, -1
318315
; CHECK-NEXT: No successors
316+
; CHECK-EMPTY:
317+
; CHECK-NEXT: ir-bb<for.cond.cleanup.loopexit>:
318+
; CHECK-NEXT: No successors
319319
; CHECK-NEXT: }
320320
; CHECK-NEXT: LV: Found an estimated cost of 0 for VF vscale x 4 For instruction: %indvars.iv = phi i64 [ %0, %for.body.preheader ], [ %indvars.iv.next, %for.body ]
321321
; CHECK-NEXT: LV: Found an estimated cost of 0 for VF vscale x 4 For instruction: %i.0.in8 = phi i32 [ %n, %for.body.preheader ], [ %i.0, %for.body ]
@@ -396,9 +396,6 @@ define void @vector_reverse_f32(ptr nocapture noundef writeonly %A, ptr nocaptur
396396
; CHECK-NEXT: EMIT branch-on-cond vp<[[CMP]]>
397397
; CHECK-NEXT: Successor(s): ir-bb<for.cond.cleanup.loopexit>, scalar.ph
398398
; CHECK-EMPTY:
399-
; CHECK-NEXT: ir-bb<for.cond.cleanup.loopexit>:
400-
; CHECK-NEXT: No successors
401-
; CHECK-EMPTY:
402399
; CHECK-NEXT: scalar.ph:
403400
; CHECK-NEXT: Successor(s): ir-bb<for.body>
404401
; CHECK-EMPTY:
@@ -407,6 +404,9 @@ define void @vector_reverse_f32(ptr nocapture noundef writeonly %A, ptr nocaptur
407404
; CHECK-NEXT: IR %i.0.in8 = phi i32 [ %n, %for.body.preheader ], [ %i.0, %for.body ]
408405
; CHECK: IR %indvars.iv.next = add nsw i64 %indvars.iv, -1
409406
; CHECK-NEXT: No successors
407+
; CHECK-EMPTY:
408+
; CHECK-NEXT: ir-bb<for.cond.cleanup.loopexit>:
409+
; CHECK-NEXT: No successors
410410
; CHECK-NEXT: }
411411
; CHECK: LV: Loop does not require scalar epilogue
412412
;

‎llvm/test/Transforms/LoopVectorize/RISCV/vplan-vp-intrinsics-reduction.ll‎

Lines changed: 16 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -59,10 +59,6 @@ define i32 @reduction(ptr %a, i64 %n, i32 %start) {
5959
; IF-EVL-OUTLOOP-NEXT: EMIT branch-on-cond ir<true>
6060
; IF-EVL-OUTLOOP-NEXT: Successor(s): ir-bb<for.end>, scalar.ph
6161
; IF-EVL-OUTLOOP-EMPTY:
62-
; IF-EVL-OUTLOOP-NEXT: ir-bb<for.end>:
63-
; IF-EVL-OUTLOOP-NEXT: IR %add.lcssa = phi i32 [ %add, %for.body ] (extra operand: vp<[[RDX_EX]]> from middle.block)
64-
; IF-EVL-OUTLOOP-NEXT: No successors
65-
; IF-EVL-OUTLOOP-EMPTY:
6662
; IF-EVL-OUTLOOP-NEXT: scalar.ph:
6763
; IF-EVL-OUTLOOP-NEXT: EMIT vp<[[RED_RESUME:%.+]]> = resume-phi vp<[[RDX]]>, ir<%start>
6864
; IF-EVL-OUTLOOP-NEXT: Successor(s): ir-bb<for.body>
@@ -72,6 +68,10 @@ define i32 @reduction(ptr %a, i64 %n, i32 %start) {
7268
; IF-EVL-OUTLOOP-NEXT: IR %rdx = phi i32 [ %start, %entry ], [ %add, %for.body ]
7369
; IF-EVL-OUTLOOP: IR %exitcond.not = icmp eq i64 %iv.next, %n
7470
; IF-EVL-OUTLOOP-NEXT: No successors
71+
; IF-EVL-OUTLOOP-EMPTY:
72+
; IF-EVL-OUTLOOP-NEXT: ir-bb<for.end>:
73+
; IF-EVL-OUTLOOP-NEXT: IR %add.lcssa = phi i32 [ %add, %for.body ] (extra operand: vp<[[RDX_EX]]> from middle.block)
74+
; IF-EVL-OUTLOOP-NEXT: No successors
7575
; IF-EVL-OUTLOOP-NEXT: }
7676
;
7777

@@ -109,10 +109,6 @@ define i32 @reduction(ptr %a, i64 %n, i32 %start) {
109109
; IF-EVL-INLOOP-NEXT: EMIT branch-on-cond ir<true>
110110
; IF-EVL-INLOOP-NEXT: Successor(s): ir-bb<for.end>, scalar.ph
111111
; IF-EVL-INLOOP-EMPTY:
112-
; IF-EVL-INLOOP-NEXT: ir-bb<for.end>:
113-
; IF-EVL-INLOOP-NEXT: IR %add.lcssa = phi i32 [ %add, %for.body ] (extra operand: vp<[[RDX_EX]]> from middle.block)
114-
; IF-EVL-INLOOP-NEXT: No successors
115-
; IF-EVL-INLOOP-EMPTY:
116112
; IF-EVL-INLOOP-NEXT: scalar.ph:
117113
; IF-EVL-INLOOP-NEXT: EMIT vp<[[RED_RESUME:%.+]]> = resume-phi vp<[[RDX]]>, ir<%start>
118114
; IF-EVL-INLOOP-NEXT: Successor(s): ir-bb<for.body>
@@ -122,6 +118,10 @@ define i32 @reduction(ptr %a, i64 %n, i32 %start) {
122118
; IF-EVL-INLOOP-NEXT: IR %rdx = phi i32 [ %start, %entry ], [ %add, %for.body ]
123119
; IF-EVL-INLOOP: IR %exitcond.not = icmp eq i64 %iv.next, %n
124120
; IF-EVL-INLOOP-NEXT: No successors
121+
; IF-EVL-INLOOP-EMPTY:
122+
; IF-EVL-INLOOP-NEXT: ir-bb<for.end>:
123+
; IF-EVL-INLOOP-NEXT: IR %add.lcssa = phi i32 [ %add, %for.body ] (extra operand: vp<[[RDX_EX]]> from middle.block)
124+
; IF-EVL-INLOOP-NEXT: No successors
125125
; IF-EVL-INLOOP-NEXT: }
126126
;
127127

@@ -155,10 +155,6 @@ define i32 @reduction(ptr %a, i64 %n, i32 %start) {
155155
; NO-VP-OUTLOOP-NEXT: EMIT branch-on-cond vp<[[BOC]]>
156156
; NO-VP-OUTLOOP-NEXT: Successor(s): ir-bb<for.end>, scalar.ph
157157
; NO-VP-OUTLOOP-EMPTY:
158-
; NO-VP-OUTLOOP-NEXT: ir-bb<for.end>:
159-
; NO-VP-OUTLOOP-NEXT: IR %add.lcssa = phi i32 [ %add, %for.body ] (extra operand: vp<[[RDX_EX]]> from middle.block)
160-
; NO-VP-OUTLOOP-NEXT: No successors
161-
; NO-VP-OUTLOOP-EMPTY:
162158
; NO-VP-OUTLOOP-NEXT: scalar.ph:
163159
; NO-VP-OUTLOOP-NEXT: EMIT vp<[[RED_RESUME:%.+]]> = resume-phi vp<[[RDX]]>, ir<%start>
164160
; NO-VP-OUTLOOP-NEXT: Successor(s): ir-bb<for.body>
@@ -168,6 +164,10 @@ define i32 @reduction(ptr %a, i64 %n, i32 %start) {
168164
; NO-VP-OUTLOOP-NEXT: IR %rdx = phi i32 [ %start, %entry ], [ %add, %for.body ]
169165
; NO-VP-OUTLOOP: IR %exitcond.not = icmp eq i64 %iv.next, %n
170166
; NO-VP-OUTLOOP-NEXT: No successors
167+
; NO-VP-OUTLOOP-EMPTY:
168+
; NO-VP-OUTLOOP-NEXT: ir-bb<for.end>:
169+
; NO-VP-OUTLOOP-NEXT: IR %add.lcssa = phi i32 [ %add, %for.body ] (extra operand: vp<[[RDX_EX]]> from middle.block)
170+
; NO-VP-OUTLOOP-NEXT: No successors
171171
; NO-VP-OUTLOOP-NEXT: }
172172
;
173173

@@ -201,10 +201,6 @@ define i32 @reduction(ptr %a, i64 %n, i32 %start) {
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; NO-VP-INLOOP-NEXT: EMIT branch-on-cond vp<[[BOC]]>
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; NO-VP-INLOOP-NEXT: Successor(s): ir-bb<for.end>, scalar.ph
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; NO-VP-INLOOP-EMPTY:
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; NO-VP-INLOOP-NEXT: ir-bb<for.end>:
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; NO-VP-INLOOP-NEXT: IR %add.lcssa = phi i32 [ %add, %for.body ] (extra operand: vp<[[RDX_EX]]> from middle.block)
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; NO-VP-INLOOP-NEXT: No successors
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; NO-VP-INLOOP-EMPTY:
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; NO-VP-INLOOP-NEXT: scalar.ph:
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; NO-VP-INLOOP-NEXT: EMIT vp<[[RED_RESUME:%.+]]> = resume-phi vp<[[RDX]]>, ir<%start>
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; NO-VP-INLOOP-NEXT: Successor(s): ir-bb<for.body>
@@ -214,6 +210,10 @@ define i32 @reduction(ptr %a, i64 %n, i32 %start) {
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; NO-VP-INLOOP-NEXT: IR %rdx = phi i32 [ %start, %entry ], [ %add, %for.body ]
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; NO-VP-INLOOP: IR %exitcond.not = icmp eq i64 %iv.next, %n
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; NO-VP-INLOOP-NEXT: No successors
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; NO-VP-INLOOP-EMPTY:
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; NO-VP-INLOOP-NEXT: ir-bb<for.end>:
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; NO-VP-INLOOP-NEXT: IR %add.lcssa = phi i32 [ %add, %for.body ] (extra operand: vp<[[RDX_EX]]> from middle.block)
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; NO-VP-INLOOP-NEXT: No successors
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; NO-VP-INLOOP-NEXT: }
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;
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entry:

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