Minimize the test case for better comprehension

Author: kaadam

bolt/test/AArch64/test-indirect-branch.s

@@ -1,19 +1,24 @@
 // Test how BOLT handles indirect branch sequence of instructions in
 // AArch64MCPlus builder.
-// This test checks the pattern where there is no shift amount after add
-// instruction. The pattern come from libc, it can be reproduced with
-// a 'static' built binary.
+
+// clang-format off
+
+// REQUIRES: system-linux
+// RUN: llvm-mc -filetype=obj -triple aarch64-unknown-unknown %s -o %t.o
+// RUN: %clang %cflags --target=aarch64-unknown-linux %t.o -o %t.exe -Wl,-q
+// RUN: llvm-bolt %t.exe -o %t.bolt --print-cfg \
+// RUN:  -v=1 2>&1 | FileCheck %s
+
+// Pattern 1: there is no shift amount after the 'add' instruction.
 //
 //   adr     x6, 0x219fb0 <sigall_set+0x88>
 //   add     x6, x6, x14, lsl #2
 //   ldr     w7, [x6]
 //   add     x6, x6, w7, sxtw => no shift amount
 //   br      x6
 //
-// It also tests another case where there is no adrp/add pair.
-// The pattern also come from libc, and it only represents in the binary
-// if the lld linker is used to create the static binary.
-// It doesn't occur with GCC ld linker.
+
+// Pattern 2: nop/adr pair is used in place of adrp/add
 //
 //  nop   => nop/adr instead of adrp/add
 //  adr     x13, 0x215a18 <_nl_value_type_LC_COLLATE+0x50>
@@ -22,89 +27,49 @@
 //  add     x13, x12, w13, sxth #2
 //  br      x13
 
-// clang-format off
-
-// REQUIRES: system-linux
-// RUN: llvm-mc -filetype=obj -triple aarch64-unknown-unknown %s -o %t.o
-// RUN: %clang %cflags --target=aarch64-unknown-linux %t.o -o %t.exe -Wl,-q
-// RUN: llvm-bolt %t.exe -o %t.bolt --print-cfg \
-// RUN:  -v=1 2>&1 | FileCheck %s
-
-// CHECK: BOLT-WARNING: Failed to match indirect branch: nop/adr instead of adrp/add
-// CHECK: BOLT-WARNING: Failed to match indirect branch: ShiftVAL != 2
-
-
   .section .text
   .align 4
   .globl _start
   .type  _start, %function
 _start:
-  bl bar
-  bl end
+  mov     w1, #1
+  bl      bar
   mov x0, #4
   mov w8, #93
   svc #0
 
 bar:
-  mov     w1, #3
-  cmp     x1, #0
-  b.eq    end
   nop
   adr     x3, jump_table
   ldrh    w3, [x3, x1, lsl #1]
   adr     x1, .case0
   add     x3, x1, w3, sxth #2
   br      x3
+// CHECK: BOLT-WARNING: Failed to match indirect branch: nop/adr instead of adrp/add
 .case0:
   mov     w0, #1
   ret
 .case1:
-  mov     w0, #2
-  ret
-.case3:
-  mov     w0, #3
-  ret
-.case4:
-  nop
   mov     x1, #0
   adr     x3, datatable
   add     x3, x3, x1, lsl #2
   ldr     w2, [x3]
   add     x3, x3, w2, sxtw
   br      x3
-  nop
-  mov     w0, #4
-  ret
-.case7:
-  mov     w0, #4
-  ret
-
+// CHECK: BOLT-WARNING: Failed to match indirect branch: ShiftVAL != 2
 foo1:
    ret
-
 foo2:
-   add    w0, w0, #3
    ret
-
 foo3:
-   add    w0, w0, #3
    ret
 
-end:
-  add     x0, x0, #99
-  ret
-
   .section .rodata,"a",@progbits
 jump_table:
   .hword  (.case0-.case0)>>2
   .hword  (.case1-.case0)>>2
-  .hword  (.case3-.case0)>>2
-  .hword  (.case4-.case0)>>2
-  .hword  (.case7-.case0)>>2
-
 
 datatable:
   .word foo1-datatable
   .word foo2-datatable
   .word foo3-datatable
-  .word 20