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2 files changed

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-33
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‎llvm/test/CodeGen/AMDGPU/inlineasm-16-fake16.ll‎

Lines changed: 46 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -1,45 +1,76 @@
1+
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
12
; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -mattr=-real-true16 < %s | FileCheck -enable-var-scope -check-prefixes=GFX11 %s
23

3-
; GFX11-LABEL: {{^}}s_input_output_i16:
4-
; GFX11: s_mov_b32 s[[REG:[0-9]+]], -1
5-
; GFX11: ; use s[[REG]]
64
define amdgpu_kernel void @s_input_output_i16() #0 {
5+
; GFX11-LABEL: s_input_output_i16:
6+
; GFX11: ; %bb.0:
7+
; GFX11-NEXT: ;;#ASMSTART
8+
; GFX11-NEXT: s_mov_b32 s0, -1
9+
; GFX11-NEXT: ;;#ASMEND
10+
; GFX11-NEXT: s_and_b32 s0, s0, 0xffff
11+
; GFX11-NEXT: ;;#ASMSTART
12+
; GFX11-NEXT: ; use s0
13+
; GFX11-NEXT: ;;#ASMEND
14+
; GFX11-NEXT: s_endpgm
715
%v = tail call i16 asm sideeffect "s_mov_b32 $0, -1", "=s"()
816
tail call void asm sideeffect "; use $0", "s"(i16 %v) #0
917
ret void
1018
}
1119

12-
; GFX11-LABEL: {{^}}s_input_output_f16:
13-
; GFX11: s_mov_b32 s[[REG:[0-9]+]], -1
14-
; GFX11: ; use s[[REG]]
1520
define amdgpu_kernel void @s_input_output_f16() #0 {
21+
; GFX11-LABEL: s_input_output_f16:
22+
; GFX11: ; %bb.0:
23+
; GFX11-NEXT: ;;#ASMSTART
24+
; GFX11-NEXT: s_mov_b32 s0, -1
25+
; GFX11-NEXT: ;;#ASMEND
26+
; GFX11-NEXT: ;;#ASMSTART
27+
; GFX11-NEXT: ; use s0
28+
; GFX11-NEXT: ;;#ASMEND
29+
; GFX11-NEXT: s_endpgm
1630
%v = tail call half asm sideeffect "s_mov_b32 $0, -1", "=s"() #0
1731
tail call void asm sideeffect "; use $0", "s"(half %v)
1832
ret void
1933
}
2034

21-
; GFX11-LABEL: {{^}}v_input_output_f16:
22-
; GFX11: v_mov_b32 v[[REG:[0-9]+]], -1
23-
; GFX11: ; use v[[REG]]
2435
define amdgpu_kernel void @v_input_output_f16() #0 {
36+
; GFX11-LABEL: v_input_output_f16:
37+
; GFX11: ; %bb.0:
38+
; GFX11-NEXT: ;;#ASMSTART
39+
; GFX11-NEXT: v_mov_b32 v0, -1
40+
; GFX11-NEXT: ;;#ASMEND
41+
; GFX11-NEXT: ;;#ASMSTART
42+
; GFX11-NEXT: ; use v0
43+
; GFX11-NEXT: ;;#ASMEND
44+
; GFX11-NEXT: s_endpgm
2545
%v = tail call half asm sideeffect "v_mov_b32 $0, -1", "=v"() #0
2646
tail call void asm sideeffect "; use $0", "v"(half %v)
2747
ret void
2848
}
2949

30-
; GFX11-LABEL: {{^}}v_input_output_i16:
31-
; GFX11: v_mov_b32 v[[REG:[0-9]+]], -1
32-
; GFX11: ; use v[[REG]]
3350
define amdgpu_kernel void @v_input_output_i16() #0 {
51+
; GFX11-LABEL: v_input_output_i16:
52+
; GFX11: ; %bb.0:
53+
; GFX11-NEXT: ;;#ASMSTART
54+
; GFX11-NEXT: v_mov_b32 v0, -1
55+
; GFX11-NEXT: ;;#ASMEND
56+
; GFX11-NEXT: v_and_b32_e32 v0, 0xffff, v0
57+
; GFX11-NEXT: ;;#ASMSTART
58+
; GFX11-NEXT: ; use v0
59+
; GFX11-NEXT: ;;#ASMEND
60+
; GFX11-NEXT: s_endpgm
3461
%v = tail call i16 asm sideeffect "v_mov_b32 $0, -1", "=v"() #0
3562
tail call void asm sideeffect "; use $0", "v"(i16 %v)
3663
ret void
3764
}
3865

39-
; GFX11-LABEL: {{^}}i16_imm_input_phys_vgpr:
40-
; GFX11: v_mov_b32_e32 v0, 0xffff
41-
; GFX11: ; use v0
4266
define amdgpu_kernel void @i16_imm_input_phys_vgpr() {
67+
; GFX11-LABEL: i16_imm_input_phys_vgpr:
68+
; GFX11: ; %bb.0: ; %entry
69+
; GFX11-NEXT: v_mov_b32_e32 v0, 0xffff
70+
; GFX11-NEXT: ;;#ASMSTART
71+
; GFX11-NEXT: ; use v0
72+
; GFX11-NEXT: ;;#ASMEND
73+
; GFX11-NEXT: s_endpgm
4374
entry:
4475
call void asm sideeffect "; use $0 ", "{v0}"(i16 65535)
4576
ret void

‎llvm/test/CodeGen/AMDGPU/inlineasm-16-true16.ll‎

Lines changed: 52 additions & 18 deletions
Original file line numberDiff line numberDiff line change
@@ -1,54 +1,88 @@
1+
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
12
; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -mattr=+real-true16 < %s | FileCheck -enable-var-scope -check-prefixes=GFX11 %s
23

3-
; GFX11-LABEL: {{^}}s_input_output_i16:
4-
; GFX11: s_mov_b32 s[[REG:[0-9]+]], -1
5-
; GFX11: ; use s[[REG]]
64
define amdgpu_kernel void @s_input_output_i16() #0 {
5+
; GFX11-LABEL: s_input_output_i16:
6+
; GFX11: ; %bb.0:
7+
; GFX11-NEXT: ;;#ASMSTART
8+
; GFX11-NEXT: s_mov_b32 s0, -1
9+
; GFX11-NEXT: ;;#ASMEND
10+
; GFX11-NEXT: s_and_b32 s0, s0, 0xffff
11+
; GFX11-NEXT: ;;#ASMSTART
12+
; GFX11-NEXT: ; use s0
13+
; GFX11-NEXT: ;;#ASMEND
14+
; GFX11-NEXT: s_endpgm
715
%v = tail call i16 asm sideeffect "s_mov_b32 $0, -1", "=s"()
816
tail call void asm sideeffect "; use $0", "s"(i16 %v) #0
917
ret void
1018
}
1119

12-
; GFX11-LABEL: {{^}}s_input_output_f16:
13-
; GFX11: s_mov_b32 s[[REG:[0-9]+]], -1
14-
; GFX11: ; use s[[REG]]
1520
define amdgpu_kernel void @s_input_output_f16() #0 {
21+
; GFX11-LABEL: s_input_output_f16:
22+
; GFX11: ; %bb.0:
23+
; GFX11-NEXT: ;;#ASMSTART
24+
; GFX11-NEXT: s_mov_b32 s0, -1
25+
; GFX11-NEXT: ;;#ASMEND
26+
; GFX11-NEXT: ;;#ASMSTART
27+
; GFX11-NEXT: ; use s0
28+
; GFX11-NEXT: ;;#ASMEND
29+
; GFX11-NEXT: s_endpgm
1630
%v = tail call half asm sideeffect "s_mov_b32 $0, -1", "=s"() #0
1731
tail call void asm sideeffect "; use $0", "s"(half %v)
1832
ret void
1933
}
2034

21-
; GFX11-LABEL: {{^}}v_input_output_f16:
22-
; GFX11: v_mov_b16 v[[REG:[0-9]+.(l|h)]], -1
23-
; GFX11: ; use v[[REG]]
2435
define amdgpu_kernel void @v_input_output_f16() #0 {
36+
; GFX11-LABEL: v_input_output_f16:
37+
; GFX11: ; %bb.0:
38+
; GFX11-NEXT: ;;#ASMSTART
39+
; GFX11-NEXT: v_mov_b16 v0.l, -1
40+
; GFX11-NEXT: ;;#ASMEND
41+
; GFX11-NEXT: ;;#ASMSTART
42+
; GFX11-NEXT: ; use v0.l
43+
; GFX11-NEXT: ;;#ASMEND
44+
; GFX11-NEXT: s_endpgm
2545
%v = tail call half asm sideeffect "v_mov_b16 $0, -1", "=v"() #0
2646
tail call void asm sideeffect "; use $0", "v"(half %v)
2747
ret void
2848
}
2949

30-
; GFX11-LABEL: {{^}}v_input_output_i16:
31-
; GFX11: v_mov_b16 v[[REG:[0-9]+.(l|h)]], -1
32-
; GFX11: ; use v[[REG]]
3350
define amdgpu_kernel void @v_input_output_i16() #0 {
51+
; GFX11-LABEL: v_input_output_i16:
52+
; GFX11: ; %bb.0:
53+
; GFX11-NEXT: ;;#ASMSTART
54+
; GFX11-NEXT: v_mov_b16 v0.l, -1
55+
; GFX11-NEXT: ;;#ASMEND
56+
; GFX11-NEXT: ;;#ASMSTART
57+
; GFX11-NEXT: ; use v0.l
58+
; GFX11-NEXT: ;;#ASMEND
59+
; GFX11-NEXT: s_endpgm
3460
%v = tail call i16 asm sideeffect "v_mov_b16 $0, -1", "=v"() #0
3561
tail call void asm sideeffect "; use $0", "v"(i16 %v)
3662
ret void
3763
}
3864

39-
; GFX11-LABEL: {{^}}i16_imm_input_phys_vgpr_lo:
40-
; GFX11: v_mov_b16_e32 v0.l, -1
41-
; GFX11: ; use v0.l
4265
define amdgpu_kernel void @i16_imm_input_phys_vgpr_lo() {
66+
; GFX11-LABEL: i16_imm_input_phys_vgpr_lo:
67+
; GFX11: ; %bb.0: ; %entry
68+
; GFX11-NEXT: v_mov_b16_e32 v0.l, -1
69+
; GFX11-NEXT: ;;#ASMSTART
70+
; GFX11-NEXT: ; use v0.l
71+
; GFX11-NEXT: ;;#ASMEND
72+
; GFX11-NEXT: s_endpgm
4373
entry:
4474
call void asm sideeffect "; use $0 ", "{v0.l}"(i16 65535)
4575
ret void
4676
}
4777

48-
; GFX11-LABEL: {{^}}i16_imm_input_phys_vgpr_hi:
49-
; GFX11: v_mov_b16_e32 v0.h, -1
50-
; GFX11: ; use v0.h
5178
define amdgpu_kernel void @i16_imm_input_phys_vgpr_hi() {
79+
; GFX11-LABEL: i16_imm_input_phys_vgpr_hi:
80+
; GFX11: ; %bb.0: ; %entry
81+
; GFX11-NEXT: v_mov_b16_e32 v0.h, -1
82+
; GFX11-NEXT: ;;#ASMSTART
83+
; GFX11-NEXT: ; use v0.h
84+
; GFX11-NEXT: ;;#ASMEND
85+
; GFX11-NEXT: s_endpgm
5286
entry:
5387
call void asm sideeffect "; use $0 ", "{v0.h}"(i16 65535)
5488
ret void

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