@@ -720,12 +720,10 @@ TEST_F(VPBasicBlockTest, splitAtEnd) {
720720
721721#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
722722TEST_F (VPBasicBlockTest, print) {
723- VPInstruction *TC = new VPInstruction (Instruction::PHI, {});
724- VPlan &Plan = getPlan (TC);
723+ VPlan &Plan = getPlan ();
725724 IntegerType *Int32 = IntegerType::get (C, 32 );
726725 VPValue *Val = Plan.getOrAddLiveIn (ConstantInt::get (Int32, 1 ));
727726 VPBasicBlock *VPBB0 = Plan.getEntry ();
728- VPBB0->appendRecipe (TC);
729727
730728 VPInstruction *I1 = new VPInstruction (Instruction::Add, {Val, Val});
731729 VPInstruction *I2 = new VPInstruction (Instruction::Sub, {I1, Val});
@@ -762,28 +760,27 @@ TEST_F(VPBasicBlockTest, print) {
762760 Plan.printDOT (OS);
763761
764762 const char *ExpectedStr = R"( digraph VPlan {
765- graph [labelloc=t, fontsize=30; label="Vectorization Plan\n for UF\>=1\nvp\<%1 \> = original trip-count\n"]
763+ graph [labelloc=t, fontsize=30; label="Vectorization Plan\n for UF\>=1\nLive-in ir\<1024 \> = original trip-count\n"]
766764node [shape=rect, fontname=Courier, fontsize=30]
767765edge [fontname=Courier, fontsize=30]
768766compound=true
769767 N0 [label =
770768 "preheader:\l" +
771- " EMIT-SCALAR vp\<%1\> = phi \l" +
772769 "Successor(s): bb1\l"
773770 ]
774771 N0 -> N1 [ label=""]
775772 N1 [label =
776773 "bb1:\l" +
777- " EMIT vp\<%2 \> = add ir\<1\>, ir\<1\>\l" +
778- " EMIT vp\<%3 \> = sub vp\<%2 \>, ir\<1\>\l" +
779- " EMIT br vp\<%2 \>, vp\<%3 \>\l" +
774+ " EMIT vp\<%1 \> = add ir\<1\>, ir\<1\>\l" +
775+ " EMIT vp\<%2 \> = sub vp\<%1 \>, ir\<1\>\l" +
776+ " EMIT br vp\<%1 \>, vp\<%2 \>\l" +
780777 "Successor(s): bb2\l"
781778 ]
782779 N1 -> N2 [ label=""]
783780 N2 [label =
784781 "bb2:\l" +
785- " EMIT vp\<%5 \> = mul vp\<%3 \>, vp\<%2 \>\l" +
786- " EMIT br vp\<%5 \>\l" +
782+ " EMIT vp\<%4 \> = mul vp\<%2 \>, vp\<%1 \>\l" +
783+ " EMIT br vp\<%4 \>\l" +
787784 "Successor(s): ir-bb\<scalar.header\>\l"
788785 ]
789786 N2 -> N3 [ label=""]
@@ -796,9 +793,9 @@ compound=true
796793 EXPECT_EQ (ExpectedStr, FullDump);
797794
798795 const char *ExpectedBlock1Str = R"( bb1:
799- EMIT vp<%2 > = add ir<1>, ir<1>
800- EMIT vp<%3 > = sub vp<%2 >, ir<1>
801- EMIT br vp<%2 >, vp<%3 >
796+ EMIT vp<%1 > = add ir<1>, ir<1>
797+ EMIT vp<%2 > = sub vp<%1 >, ir<1>
798+ EMIT br vp<%1 >, vp<%2 >
802799Successor(s): bb2
803800)" ;
804801 std::string Block1Dump;
@@ -808,8 +805,8 @@ Successor(s): bb2
808805
809806 // Ensure that numbering is good when dumping the second block in isolation.
810807 const char *ExpectedBlock2Str = R"( bb2:
811- EMIT vp<%5 > = mul vp<%3 >, vp<%2 >
812- EMIT br vp<%5 >
808+ EMIT vp<%4 > = mul vp<%2 >, vp<%1 >
809+ EMIT br vp<%4 >
813810Successor(s): ir-bb<scalar.header>
814811)" ;
815812 std::string Block2Dump;
@@ -822,22 +819,20 @@ Successor(s): ir-bb<scalar.header>
822819 raw_string_ostream OS (I3Dump);
823820 VPSlotTracker SlotTracker (&Plan);
824821 I3->print (OS, " " , SlotTracker);
825- EXPECT_EQ (" EMIT br vp<%2 >, vp<%3 >" , I3Dump);
822+ EXPECT_EQ (" EMIT br vp<%1 >, vp<%2 >" , I3Dump);
826823 }
827824
828825 {
829826 std::string I4Dump;
830827 raw_string_ostream OS (I4Dump);
831828 OS << *I4;
832- EXPECT_EQ (" EMIT vp<%5 > = mul vp<%3 >, vp<%2 >" , I4Dump);
829+ EXPECT_EQ (" EMIT vp<%4 > = mul vp<%2 >, vp<%1 >" , I4Dump);
833830 }
834831}
835832
836833TEST_F (VPBasicBlockTest, printPlanWithVFsAndUFs) {
837- VPInstruction *TC = new VPInstruction (Instruction::Sub, {});
838- VPlan &Plan = getPlan (TC);
834+ VPlan &Plan = getPlan ();
839835 VPBasicBlock *VPBB0 = Plan.getEntry ();
840- VPBB0->appendRecipe (TC);
841836
842837 VPInstruction *I1 = new VPInstruction (Instruction::Add, {});
843838 VPBasicBlock *VPBB1 = Plan.createVPBasicBlock (" " );
@@ -855,14 +850,13 @@ TEST_F(VPBasicBlockTest, printPlanWithVFsAndUFs) {
855850 Plan.print (OS);
856851
857852 const char *ExpectedStr = R"( VPlan 'TestPlan for VF={4},UF>=1' {
858- vp<%1 > = original trip-count
853+ Live-in ir<1024 > = original trip-count
859854
860855preheader:
861- EMIT vp<%1> = sub
862856Successor(s): bb1
863857
864858bb1:
865- EMIT vp<%2 > = add
859+ EMIT vp<%1 > = add
866860Successor(s): ir-bb<scalar.header>
867861
868862ir-bb<scalar.header>:
@@ -879,14 +873,13 @@ No successors
879873 Plan.print (OS);
880874
881875 const char *ExpectedStr = R"( VPlan 'TestPlan for VF={4,vscale x 8},UF>=1' {
882- vp<%1 > = original trip-count
876+ Live-in ir<1024 > = original trip-count
883877
884878preheader:
885- EMIT vp<%1> = sub
886879Successor(s): bb1
887880
888881bb1:
889- EMIT vp<%2 > = add
882+ EMIT vp<%1 > = add
890883Successor(s): ir-bb<scalar.header>
891884
892885ir-bb<scalar.header>:
@@ -903,14 +896,13 @@ No successors
903896 Plan.print (OS);
904897
905898 const char *ExpectedStr = R"( VPlan 'TestPlan for VF={4,vscale x 8},UF={4}' {
906- vp<%1 > = original trip-count
899+ Live-in ir<1024 > = original trip-count
907900
908901preheader:
909- EMIT vp<%1> = sub
910902Successor(s): bb1
911903
912904bb1:
913- EMIT vp<%2 > = add
905+ EMIT vp<%1 > = add
914906Successor(s): ir-bb<scalar.header>
915907
916908ir-bb<scalar.header>:
@@ -922,7 +914,7 @@ No successors
922914}
923915
924916TEST_F (VPBasicBlockTest, cloneAndPrint) {
925- VPlan &Plan = getPlan (nullptr );
917+ VPlan &Plan = getPlan ();
926918 VPBasicBlock *VPBB0 = Plan.getEntry ();
927919
928920 IntegerType *Int32 = IntegerType::get (C, 32 );
@@ -940,7 +932,7 @@ TEST_F(VPBasicBlockTest, cloneAndPrint) {
940932 VPBlockUtils::connectBlocks (VPBB0, VPBB1);
941933
942934 const char *ExpectedStr = R"( digraph VPlan {
943- graph [labelloc=t, fontsize=30; label="Vectorization Plan\n for UF\>=1\n"]
935+ graph [labelloc=t, fontsize=30; label="Vectorization Plan\n for UF\>=1\nLive-in ir\<1024\> = original trip-count\ n"]
944936node [shape=rect, fontname=Courier, fontsize=30]
945937edge [fontname=Courier, fontsize=30]
946938compound=true
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