pre-commit test

Author: macsencasaus

llvm/test/Transforms/InstCombine/select-reconstruction.ll

@@ -0,0 +1,112 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
+; RUN: opt < %s -passes=instcombine -S | FileCheck %s
+
+define i40 @select_reconstruction_i40(i40 %arg0) {
+; CHECK-LABEL: define i40 @select_reconstruction_i40(
+; CHECK-SAME: i40 [[ARG0:%.*]]) {
+; CHECK-NEXT:    [[TMP1:%.*]] = trunc i40 [[ARG0]] to i8
+; CHECK-NEXT:    [[TMP2:%.*]] = icmp eq i8 [[TMP1]], 2
+; CHECK-NEXT:    [[TMP7:%.*]] = and i40 [[ARG0]], -256
+; CHECK-NEXT:    [[TMP4:%.*]] = select i1 [[TMP2]], i8 0, i8 [[TMP1]]
+; CHECK-NEXT:    [[TMP5:%.*]] = select i1 [[TMP2]], i40 0, i40 [[TMP7]]
+; CHECK-NEXT:    [[TMP6:%.*]] = zext i8 [[TMP4]] to i40
+; CHECK-NEXT:    [[TMP3:%.*]] = or disjoint i40 [[TMP5]], [[TMP6]]
+; CHECK-NEXT:    ret i40 [[TMP3]]
+;
+  %1 = trunc i40 %arg0 to i8
+  %2 = icmp eq i8 %1, 2
+  %3 = and i40 %arg0, -256
+  %4 = select i1 %2, i8 0, i8 %1
+  %5 = select i1 %2, i40 0, i40 %3
+  %6 = zext i8 %4 to i40
+  %7 = or disjoint i40 %5, %6
+  ret i40 %7
+}
+
+define i40 @select_reconstruction_any_cmp_val(i40 %arg0, i8 %arg1) {
+; CHECK-LABEL: define i40 @select_reconstruction_any_cmp_val(
+; CHECK-SAME: i40 [[ARG0:%.*]], i8 [[ARG1:%.*]]) {
+; CHECK-NEXT:    [[TMP1:%.*]] = trunc i40 [[ARG0]] to i8
+; CHECK-NEXT:    [[TMP2:%.*]] = icmp eq i8 [[ARG1]], [[TMP1]]
+; CHECK-NEXT:    [[TMP7:%.*]] = and i40 [[ARG0]], -256
+; CHECK-NEXT:    [[TMP4:%.*]] = select i1 [[TMP2]], i8 0, i8 [[TMP1]]
+; CHECK-NEXT:    [[TMP5:%.*]] = select i1 [[TMP2]], i40 0, i40 [[TMP7]]
+; CHECK-NEXT:    [[TMP6:%.*]] = zext i8 [[TMP4]] to i40
+; CHECK-NEXT:    [[TMP3:%.*]] = or disjoint i40 [[TMP5]], [[TMP6]]
+; CHECK-NEXT:    ret i40 [[TMP3]]
+;
+  %1 = trunc i40 %arg0 to i8
+  %2 = icmp eq i8 %1, %arg1
+  %3 = and i40 %arg0, -256
+  %4 = select i1 %2, i8 0, i8 %1
+  %5 = select i1 %2, i40 0, i40 %3
+  %6 = zext i8 %4 to i40
+  %7 = or disjoint i40 %5, %6
+  ret i40 %7
+}
+
+define i40 @select_reconstruction_257_mask(i40 %arg0) {
+; CHECK-LABEL: define i40 @select_reconstruction_257_mask(
+; CHECK-SAME: i40 [[ARG0:%.*]]) {
+; CHECK-NEXT:    [[TMP1:%.*]] = trunc i40 [[ARG0]] to i8
+; CHECK-NEXT:    [[TMP2:%.*]] = icmp eq i8 [[TMP1]], 2
+; CHECK-NEXT:    [[TMP3:%.*]] = and i40 [[ARG0]], -257
+; CHECK-NEXT:    [[TMP5:%.*]] = select i1 [[TMP2]], i8 0, i8 [[TMP1]]
+; CHECK-NEXT:    [[TMP4:%.*]] = select i1 [[TMP2]], i40 0, i40 [[TMP3]]
+; CHECK-NEXT:    [[TMP6:%.*]] = zext i8 [[TMP5]] to i40
+; CHECK-NEXT:    [[TMP7:%.*]] = or disjoint i40 [[TMP4]], [[TMP6]]
+; CHECK-NEXT:    ret i40 [[TMP7]]
+;
+  %1 = trunc i40 %arg0 to i8
+  %2 = icmp eq i8 %1, 2
+  %3 = and i40 %arg0, -257
+  %4 = select i1 %2, i8 0, i8 %1
+  %5 = select i1 %2, i40 0, i40 %3
+  %6 = zext i8 %4 to i40
+  %7 = or disjoint i40 %5, %6
+  ret i40 %7
+}
+
+define i40 @select_reconstruction_i16_mask(i40 %arg0) {
+; CHECK-LABEL: define i40 @select_reconstruction_i16_mask(
+; CHECK-SAME: i40 [[ARG0:%.*]]) {
+; CHECK-NEXT:    [[TMP1:%.*]] = trunc i40 [[ARG0]] to i16
+; CHECK-NEXT:    [[TMP2:%.*]] = icmp eq i16 [[TMP1]], 2
+; CHECK-NEXT:    [[TMP7:%.*]] = and i40 [[ARG0]], -65356
+; CHECK-NEXT:    [[TMP4:%.*]] = select i1 [[TMP2]], i16 0, i16 [[TMP1]]
+; CHECK-NEXT:    [[TMP5:%.*]] = select i1 [[TMP2]], i40 0, i40 [[TMP7]]
+; CHECK-NEXT:    [[TMP6:%.*]] = zext i16 [[TMP4]] to i40
+; CHECK-NEXT:    [[TMP3:%.*]] = or disjoint i40 [[TMP5]], [[TMP6]]
+; CHECK-NEXT:    ret i40 [[TMP3]]
+;
+  %1 = trunc i40 %arg0 to i16
+  %2 = icmp eq i16 %1, 2
+  %3 = and i40 %arg0, -65356
+  %4 = select i1 %2, i16 0, i16 %1
+  %5 = select i1 %2, i40 0, i40 %3
+  %6 = zext i16 %4 to i40
+  %7 = or disjoint i40 %5, %6
+  ret i40 %7
+}
+
+define <2 x i32> @select_reconstruction_vec_any_cmp_val(<2 x i32> %arg0, <2 x i8> %arg1) {
+; CHECK-LABEL: define <2 x i32> @select_reconstruction_vec_any_cmp_val(
+; CHECK-SAME: <2 x i32> [[ARG0:%.*]], <2 x i8> [[ARG1:%.*]]) {
+; CHECK-NEXT:    [[TMP1:%.*]] = trunc <2 x i32> [[ARG0]] to <2 x i8>
+; CHECK-NEXT:    [[TMP2:%.*]] = icmp eq <2 x i8> [[ARG1]], [[TMP1]]
+; CHECK-NEXT:    [[TMP3:%.*]] = and <2 x i32> [[ARG0]], splat (i32 -256)
+; CHECK-NEXT:    [[TMP4:%.*]] = select <2 x i1> [[TMP2]], <2 x i8> zeroinitializer, <2 x i8> [[TMP1]]
+; CHECK-NEXT:    [[TMP5:%.*]] = select <2 x i1> [[TMP2]], <2 x i32> zeroinitializer, <2 x i32> [[TMP3]]
+; CHECK-NEXT:    [[TMP6:%.*]] = zext <2 x i8> [[TMP4]] to <2 x i32>
+; CHECK-NEXT:    [[TMP7:%.*]] = or disjoint <2 x i32> [[TMP5]], [[TMP6]]
+; CHECK-NEXT:    ret <2 x i32> [[TMP7]]
+;
+  %1 = trunc <2 x i32> %arg0 to <2 x i8>
+  %2 = icmp eq <2 x i8> %1, %arg1
+  %3 = and <2 x i32> %arg0, <i32 -256, i32 -256>
+  %4 = select <2 x i1> %2, <2 x i8> <i8 0, i8 0>, <2 x i8> %1
+  %5 = select <2 x i1> %2, <2 x i32> <i32 0, i32 0>, <2 x i32> %3
+  %6 = zext <2 x i8> %4 to <2 x i32>
+  %7 = or <2 x i32> %5, %6
+  ret <2 x i32> %7
+}