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[CIR][CIRGen][Builtin][X86] Masked compress Intrinsics
This pr is related to the issue #167765 Added the support Masked compress builtin in CIR codeGen
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3 files changed

+230
-11
lines changed

3 files changed

+230
-11
lines changed

‎clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp‎

Lines changed: 19 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -25,9 +25,16 @@ static mlir::Value emitIntrinsicCallOp(CIRGenBuilderTy &builder,
2525
mlir::Location loc, const StringRef str,
2626
const mlir::Type &resTy,
2727
Operands &&...op) {
28+
<<<<<<< HEAD
2829
return cir::LLVMIntrinsicCallOp::create(builder, loc,
30+
=======
31+
CIRGenBuilderTy &builder = cgf.getBuilder();
32+
mlir::Location location = cgf.getLoc(e->getExprLoc());
33+
llvm::SmallVector<mlir::Value> operands{std::forward<Operands>(op)...};
34+
return cir::LLVMIntrinsicCallOp::create(builder, location,
35+
>>>>>>> 320f8069e917 ([CIR][CIRGen][Builtin][X86] Masked compress Intrinsics)
2936
builder.getStringAttr(str), resTy,
30-
std::forward<Operands>(op)...)
37+
operands)
3138
.getResult();
3239
}
3340

@@ -84,13 +91,10 @@ static mlir::Value getMaskVecValue(CIRGenBuilderTy &builder, mlir::Location loc,
8491
}
8592
return maskVec;
8693
}
87-
static mlir::Value emitX86CompressExpand(CIRGenFunction &cgf, const CallExpr *expr,ArrayRef<mlir::Value> ops, bool IsCompress, const std::string &ID){
88-
auto ResultTy = cast<cir::VectorType>(ops[1].getType());
89-
mlir::Value MaskValue = getMaskVecValue(cgf, expr, ops[2], cast<cir::VectorType>(ResultTy).getSize());
90-
llvm::SmallVector<mlir::Value, 4> op{ops[0], ops[1], MaskValue};
91-
92-
return emitIntrinsicCallOp(cgf,expr, ID, ResultTy, op);
93-
94+
static mlir::Value emitX86CompressExpand(CIRGenFunction &cgf, const CallExpr *expr, mlir::Value source, mlir::Value mask, mlir::Value inputVector, const std::string &id){
95+
auto ResultTy = cast<cir::VectorType>(mask.getType());
96+
mlir::Value MaskValue = getMaskVecValue(cgf, expr, inputVector, cast<cir::VectorType>(ResultTy).getSize());
97+
return emitIntrinsicCallOp(cgf,expr, id, ResultTy, source, mask, MaskValue);
9498
}
9599

96100
mlir::Value CIRGenFunction::emitX86BuiltinExpr(unsigned builtinID,
@@ -429,6 +433,10 @@ mlir::Value CIRGenFunction::emitX86BuiltinExpr(unsigned builtinID,
429433
case X86::BI__builtin_ia32_compressstoreqi128_mask:
430434
case X86::BI__builtin_ia32_compressstoreqi256_mask:
431435
case X86::BI__builtin_ia32_compressstoreqi512_mask:
436+
cgm.errorNYI(expr->getSourceRange(),
437+
std::string("unimplemented X86 builtin call: ") +
438+
getContext().BuiltinInfo.getName(builtinID));
439+
return {};
432440
case X86::BI__builtin_ia32_expanddf128_mask:
433441
case X86::BI__builtin_ia32_expanddf256_mask:
434442
case X86::BI__builtin_ia32_expanddf512_mask:
@@ -447,6 +455,7 @@ mlir::Value CIRGenFunction::emitX86BuiltinExpr(unsigned builtinID,
447455
case X86::BI__builtin_ia32_expandqi128_mask:
448456
case X86::BI__builtin_ia32_expandqi256_mask:
449457
case X86::BI__builtin_ia32_expandqi512_mask:
458+
return emitX86CompressExpand(*this, expr, ops[0], ops[1], ops[2], "x86_avx512_mask_expand");
450459
case X86::BI__builtin_ia32_compressdf128_mask:
451460
case X86::BI__builtin_ia32_compressdf256_mask:
452461
case X86::BI__builtin_ia32_compressdf512_mask:
@@ -464,9 +473,8 @@ mlir::Value CIRGenFunction::emitX86BuiltinExpr(unsigned builtinID,
464473
case X86::BI__builtin_ia32_compresshi512_mask:
465474
case X86::BI__builtin_ia32_compressqi128_mask:
466475
case X86::BI__builtin_ia32_compressqi256_mask:
467-
case X86::BI__builtin_ia32_compressqi512_mask:{
468-
return emitX86CompressExpand(*this, expr, ops, true, "x86_avx512_mask_compress");
469-
}
476+
case X86::BI__builtin_ia32_compressqi512_mask:
477+
return emitX86CompressExpand(*this, expr, ops[0], ops[1], ops[2], "x86_avx512_mask_compress");
470478
case X86::BI__builtin_ia32_gather3div2df:
471479
case X86::BI__builtin_ia32_gather3div2di:
472480
case X86::BI__builtin_ia32_gather3div4df:

‎clang/test/CIR/CodeGenBuiltins/X86/avx512vl-builtins.c‎

Lines changed: 158 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,158 @@
1+
// RUN: %clang_cc1 -x c -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-unknown-linux -target-feature +avx512vlvbmi2 -fclangir -emit-cir -o %t.cir -Wall -Werror -Wsign-conversion
2+
// RUN: FileCheck --check-prefix=CIR --input-file=%t.cir %s
3+
// RUN: %clang_cc1 -x c -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-unknown-linux -target-feature +avx512vlvbmi2 -fclangir -emit-llvm -o %t.ll -Wall -Werror -Wsign-conversion
4+
// RUN: FileCheck --check-prefixes=LLVM --input-file=%t.ll %s
5+
6+
// RUN: %clang_cc1 -x c++ -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-unknown-linux -target-feature +avx512vlvbmi2 -fclangir -emit-cir -o %t.cir -Wall -Werror -Wsign-conversion
7+
// RUN: FileCheck --check-prefix=CIR --input-file=%t.cir %s
8+
// RUN: %clang_cc1 -x c++ -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-unknown-linux -target-feature +avx512vlvbmi2 -fclangir -emit-llvm -o %t.ll -Wall -Werror -Wsign-conversion
9+
// RUN: FileCheck --check-prefixes=LLVM --input-file=%t.ll %s
10+
11+
#include <immintrin.h>
12+
13+
14+
__m128d test_mm_mask_expand_pd(__m128d __W, __mmask8 __U, __m128d __A) {
15+
16+
return _mm_mask_expand_pd(__W,__U,__A);
17+
}
18+
__m128d test_mm_maskz_expand_pd(__mmask8 __U, __m128d __A) {
19+
20+
return _mm_maskz_expand_pd(__U,__A);
21+
}
22+
__m256d test_mm256_mask_expand_pd(__m256d __W, __mmask8 __U, __m256d __A) {
23+
24+
return _mm256_mask_expand_pd(__W,__U,__A);
25+
}
26+
__m256d test_mm256_maskz_expand_pd(__mmask8 __U, __m256d __A) {
27+
28+
return _mm256_maskz_expand_pd(__U,__A);
29+
}
30+
__m128i test_mm_mask_expand_epi64(__m128i __W, __mmask8 __U, __m128i __A) {
31+
32+
return _mm_mask_expand_epi64(__W,__U,__A);
33+
}
34+
__m128i test_mm_maskz_expand_epi64(__mmask8 __U, __m128i __A) {
35+
36+
return _mm_maskz_expand_epi64(__U,__A);
37+
}
38+
__m256i test_mm256_mask_expand_epi64(__m256i __W, __mmask8 __U, __m256i __A) {
39+
40+
return _mm256_mask_expand_epi64(__W,__U,__A);
41+
}
42+
__m256i test_mm256_maskz_expand_epi64(__mmask8 __U, __m256i __A) {
43+
44+
return _mm256_maskz_expand_epi64(__U,__A);
45+
}
46+
47+
__m128 test_mm_mask_expand_ps(__m128 __W, __mmask8 __U, __m128 __A) {
48+
49+
return _mm_mask_expand_ps(__W,__U,__A);
50+
}
51+
__m128 test_mm_maskz_expand_ps(__mmask8 __U, __m128 __A) {
52+
53+
return _mm_maskz_expand_ps(__U,__A);
54+
}
55+
__m256 test_mm256_mask_expand_ps(__m256 __W, __mmask8 __U, __m256 __A) {
56+
57+
return _mm256_mask_expand_ps(__W,__U,__A);
58+
}
59+
__m256 test_mm256_maskz_expand_ps(__mmask8 __U, __m256 __A) {
60+
61+
return _mm256_maskz_expand_ps(__U,__A);
62+
}
63+
__m128i test_mm_mask_expand_epi32(__m128i __W, __mmask8 __U, __m128i __A) {
64+
65+
return _mm_mask_expand_epi32(__W,__U,__A);
66+
}
67+
__m128i test_mm_maskz_expand_epi32(__mmask8 __U, __m128i __A) {
68+
69+
return _mm_maskz_expand_epi32(__U,__A);
70+
}
71+
__m256i test_mm256_mask_expand_epi32(__m256i __W, __mmask8 __U, __m256i __A) {
72+
73+
return _mm256_mask_expand_epi32(__W,__U,__A);
74+
}
75+
__m256i test_mm256_maskz_expand_epi32(__mmask8 __U, __m256i __A) {
76+
77+
return _mm256_maskz_expand_epi32(__U,__A);
78+
}
79+
80+
__m128d test_mm_mask_compress_pd(__m128d __W, __mmask8 __U, __m128d __A) {
81+
82+
return _mm_mask_compress_pd(__W,__U,__A);
83+
}
84+
85+
__m128d test_mm_maskz_compress_pd(__mmask8 __U, __m128d __A) {
86+
87+
return _mm_maskz_compress_pd(__U,__A);
88+
}
89+
90+
__m256d test_mm256_mask_compress_pd(__m256d __W, __mmask8 __U, __m256d __A) {
91+
92+
return _mm256_mask_compress_pd(__W,__U,__A);
93+
}
94+
95+
__m256d test_mm256_maskz_compress_pd(__mmask8 __U, __m256d __A) {
96+
97+
return _mm256_maskz_compress_pd(__U,__A);
98+
}
99+
100+
__m128i test_mm_mask_compress_epi64(__m128i __W, __mmask8 __U, __m128i __A) {
101+
102+
return _mm_mask_compress_epi64(__W,__U,__A);
103+
}
104+
105+
__m128i test_mm_maskz_compress_epi64(__mmask8 __U, __m128i __A) {
106+
107+
return _mm_maskz_compress_epi64(__U,__A);
108+
}
109+
110+
__m256i test_mm256_mask_compress_epi64(__m256i __W, __mmask8 __U, __m256i __A) {
111+
112+
return _mm256_mask_compress_epi64(__W,__U,__A);
113+
}
114+
115+
__m256i test_mm256_maskz_compress_epi64(__mmask8 __U, __m256i __A) {
116+
117+
return _mm256_maskz_compress_epi64(__U,__A);
118+
}
119+
120+
__m128 test_mm_mask_compress_ps(__m128 __W, __mmask8 __U, __m128 __A) {
121+
122+
return _mm_mask_compress_ps(__W,__U,__A);
123+
}
124+
125+
__m128 test_mm_maskz_compress_ps(__mmask8 __U, __m128 __A) {
126+
127+
return _mm_maskz_compress_ps(__U,__A);
128+
}
129+
130+
__m256 test_mm256_mask_compress_ps(__m256 __W, __mmask8 __U, __m256 __A) {
131+
132+
return _mm256_mask_compress_ps(__W,__U,__A);
133+
}
134+
135+
__m256 test_mm256_maskz_compress_ps(__mmask8 __U, __m256 __A) {
136+
137+
return _mm256_maskz_compress_ps(__U,__A);
138+
}
139+
140+
__m128i test_mm_mask_compress_epi32(__m128i __W, __mmask8 __U, __m128i __A) {
141+
142+
return _mm_mask_compress_epi32(__W,__U,__A);
143+
}
144+
145+
__m128i test_mm_maskz_compress_epi32(__mmask8 __U, __m128i __A) {
146+
147+
return _mm_maskz_compress_epi32(__U,__A);
148+
}
149+
150+
__m256i test_mm256_mask_compress_epi32(__m256i __W, __mmask8 __U, __m256i __A) {
151+
152+
return _mm256_mask_compress_epi32(__W,__U,__A);
153+
}
154+
155+
__m256i test_mm256_maskz_compress_epi32(__mmask8 __U, __m256i __A) {
156+
157+
return _mm256_maskz_compress_epi32(__U,__A);
158+
}

‎clang/test/CIR/CodeGenBuiltins/X86/avx512vlvbmi2-builtins.c‎

Lines changed: 53 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,53 @@
1+
2+
// RUN: %clang_cc1 -x c -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-unknown-linux -target-feature +avx512vlvbmi2 -fclangir -emit-cir -o %t.cir -Wall -Werror -Wsign-conversion
3+
// RUN: FileCheck --check-prefix=CIR --input-file=%t.cir %s
4+
// RUN: %clang_cc1 -x c -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-unknown-linux -target-feature +avx512vlvbmi2 -fclangir -emit-llvm -o %t.ll -Wall -Werror -Wsign-conversion
5+
// RUN: FileCheck --check-prefixes=LLVM --input-file=%t.ll %s
6+
7+
// RUN: %clang_cc1 -x c++ -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-unknown-linux -target-feature +avx512vlvbmi2 -fclangir -emit-cir -o %t.cir -Wall -Werror -Wsign-conversion
8+
// RUN: FileCheck --check-prefix=CIR --input-file=%t.cir %s
9+
// RUN: %clang_cc1 -x c++ -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-unknown-linux -target-feature +avx512vlvbmi2 -fclangir -emit-llvm -o %t.ll -Wall -Werror -Wsign-conversion
10+
// RUN: FileCheck --check-prefixes=LLVM --input-file=%t.ll %s
11+
12+
#include <immintrin.h>
13+
14+
15+
__m128i test_mm_mask_compress_epi16(__m128i __S, __mmask8 __U, __m128i __D) {
16+
17+
return _mm_mask_compress_epi16(__S, __U, __D);
18+
}
19+
20+
__m128i test_mm_maskz_compress_epi16(__mmask8 __U, __m128i __D) {
21+
22+
return _mm_maskz_compress_epi16(__U, __D);
23+
}
24+
25+
__m128i test_mm_mask_compress_epi8(__m128i __S, __mmask16 __U, __m128i __D) {
26+
27+
return _mm_mask_compress_epi8(__S, __U, __D);
28+
}
29+
30+
__m128i test_mm_maskz_compress_epi8(__mmask16 __U, __m128i __D) {
31+
32+
return _mm_maskz_compress_epi8(__U, __D);
33+
}
34+
35+
__m128i test_mm_mask_expand_epi16(__m128i __S, __mmask8 __U, __m128i __D) {
36+
37+
return _mm_mask_expand_epi16(__S, __U, __D);
38+
}
39+
40+
__m128i test_mm_maskz_expand_epi16(__mmask8 __U, __m128i __D) {
41+
42+
return _mm_maskz_expand_epi16(__U, __D);
43+
}
44+
45+
__m128i test_mm_mask_expand_epi8(__m128i __S, __mmask16 __U, __m128i __D) {
46+
47+
return _mm_mask_expand_epi8(__S, __U, __D);
48+
}
49+
50+
__m128i test_mm_maskz_expand_epi8(__mmask16 __U, __m128i __D) {
51+
52+
return _mm_maskz_expand_epi8(__U, __D);
53+
}

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