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VyacheslavLevytskyyVyacheslavLevytskyy
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fix insert/extract; add a test case
1 parent 2fdc350 commit 692565e

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‎llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp‎

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Original file line numberDiff line numberDiff line change
@@ -1706,6 +1706,11 @@ void SPIRVEmitIntrinsics::insertPtrCastOrAssignTypeInstr(Instruction *I,
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}
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Instruction *SPIRVEmitIntrinsics::visitInsertElementInst(InsertElementInst &I) {
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// If it's a <1 x Type> vector type, don't modify it. It's not a legal vector
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// type in LLT and IRTranslator will replace it by the scalar.
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if (isVector1(I.getType()))
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return &I;
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SmallVector<Type *, 4> Types = {I.getType(), I.getOperand(0)->getType(),
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I.getOperand(1)->getType(),
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I.getOperand(2)->getType()};
@@ -1719,6 +1724,11 @@ Instruction *SPIRVEmitIntrinsics::visitInsertElementInst(InsertElementInst &I) {
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Instruction *
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SPIRVEmitIntrinsics::visitExtractElementInst(ExtractElementInst &I) {
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// If it's a <1 x Type> vector type, don't modify it. It's not a legal vector
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// type in LLT and IRTranslator will replace it by the scalar.
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if (isVector1(I.getVectorOperandType()))
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return &I;
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IRBuilder<> B(I.getParent());
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B.SetInsertPoint(&I);
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SmallVector<Type *, 3> Types = {I.getType(), I.getVectorOperandType(),

‎llvm/lib/Target/SPIRV/SPIRVUtils.h‎

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@@ -383,6 +383,11 @@ inline const Type *unifyPtrType(const Type *Ty) {
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return toTypedPointer(const_cast<Type *>(Ty));
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}
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inline bool isVector1(Type *Ty) {
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auto *FVTy = dyn_cast<FixedVectorType>(Ty);
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return FVTy && FVTy->getNumElements() == 1;
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}
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// Modify an LLVM type to conform with future transformations in IRTranslator.
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// At the moment use cases comprise only a <1 x Type> vector. To extend when/if
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// needed.

‎llvm/test/CodeGen/SPIRV/validate/triton-tut-softmax-kernel.ll‎

Lines changed: 221 additions & 0 deletions
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@@ -0,0 +1,221 @@
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; This is an excerpt from the tutorial of the Triton language converted into
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; LLVM IR via the Triton XPU backend and cleaned of irrelevant details.
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; The only pass criterion is that spirv-val considers output valid.
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; Ths particular case is related to translation of <1 x Ty> vectors.
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; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv64-unknown-unknown %s -o - -filetype=obj | spirv-val --target-env spv1.4 %}
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define spir_kernel void @softmax_kernel(ptr addrspace(1) nocapture writeonly %0, ptr addrspace(1) nocapture readonly %1, i32 %2, i32 %3, i32 %4, i32 %5, ptr addrspace(3) nocapture %6) {
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%8 = tail call spir_func i64 @_Z12get_group_idj(i32 0)
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%9 = trunc i64 %8 to i32
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%10 = tail call spir_func i64 @_Z14get_num_groupsj(i32 0)
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%11 = trunc i64 %10 to i32
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%12 = tail call spir_func i64 @_Z12get_local_idj(i32 0)
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%13 = trunc i64 %12 to i32
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%14 = and i32 %13, 255
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%15 = or disjoint i32 %14, 256
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%16 = or disjoint i32 %14, 512
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%17 = or disjoint i32 %14, 768
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%18 = icmp slt i32 %14, %5
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%19 = icmp slt i32 %15, %5
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%20 = icmp slt i32 %16, %5
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%21 = icmp slt i32 %17, %5
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%22 = icmp sgt i32 %4, %9
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br i1 %22, label %.lr.ph, label %._crit_edge
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.lr.ph: ; preds = %7
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%23 = lshr i64 %12, 5
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%24 = and i32 %13, 31
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%25 = zext nneg i32 %15 to i64
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%26 = zext nneg i32 %16 to i64
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%27 = zext nneg i32 %17 to i64
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%28 = and i64 %12, 255
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%29 = and i64 %23, 7
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%30 = icmp eq i32 %24, 0
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%31 = getelementptr float, ptr addrspace(3) %6, i64 %29
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%32 = icmp slt i32 %13, 8
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%sext = shl i64 %12, 32
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%33 = ashr exact i64 %sext, 30
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%34 = getelementptr i8, ptr addrspace(3) %6, i64 %33
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%35 = and i32 %13, 7
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%36 = icmp eq i32 %35, 0
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%37 = and i1 %32, %36
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br label %38
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38: ; preds = %.lr.ph, %123
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%39 = phi i32 [ %9, %.lr.ph ], [ %124, %123 ]
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%40 = mul i32 %39, %2
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%41 = sext i32 %40 to i64
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%42 = getelementptr float, ptr addrspace(1) %1, i64 %41
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%43 = getelementptr float, ptr addrspace(1) %42, i64 %25
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%44 = getelementptr float, ptr addrspace(1) %42, i64 %26
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%45 = getelementptr float, ptr addrspace(1) %42, i64 %27
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br i1 %18, label %46, label %49
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46: ; preds = %38
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%47 = getelementptr float, ptr addrspace(1) %42, i64 %28
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%48 = load <1 x float>, ptr addrspace(1) %47, align 4
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br label %49
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49: ; preds = %46, %38
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%50 = phi <1 x float> [ %48, %46 ], [ splat (float 0xFFF0000000000000), %38 ]
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%51 = extractelement <1 x float> %50, i64 0
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br i1 %19, label %52, label %54
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52: ; preds = %49
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%53 = load <1 x float>, ptr addrspace(1) %43, align 4
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br label %54
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54: ; preds = %52, %49
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%55 = phi <1 x float> [ %53, %52 ], [ splat (float 0xFFF0000000000000), %49 ]
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%56 = extractelement <1 x float> %55, i64 0
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br i1 %20, label %57, label %59
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57: ; preds = %54
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%58 = load <1 x float>, ptr addrspace(1) %44, align 4
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br label %59
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59: ; preds = %57, %54
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%60 = phi <1 x float> [ %58, %57 ], [ splat (float 0xFFF0000000000000), %54 ]
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%61 = extractelement <1 x float> %60, i64 0
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br i1 %21, label %62, label %64
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62: ; preds = %59
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%63 = load <1 x float>, ptr addrspace(1) %45, align 4
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br label %64
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64: ; preds = %62, %59
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%65 = phi <1 x float> [ %63, %62 ], [ splat (float 0xFFF0000000000000), %59 ]
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%66 = extractelement <1 x float> %65, i64 0
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tail call spir_func void @_Z7barrierj(i32 1)
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%67 = tail call float @llvm.maxnum.f32(float %51, float %56)
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%68 = tail call float @llvm.maxnum.f32(float %67, float %61)
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%69 = tail call float @llvm.maxnum.f32(float %68, float %66)
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%70 = tail call spir_func float @_Z27__spirv_GroupNonUniformFMaxiif(i32 3, i32 0, float %69)
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br i1 %30, label %71, label %72
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71: ; preds = %64
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store float %70, ptr addrspace(3) %31, align 4
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br label %72
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72: ; preds = %71, %64
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tail call spir_func void @_Z7barrierj(i32 1)
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br i1 %32, label %74, label %.thread1
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.thread1: ; preds = %72
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%73 = tail call spir_func float @_Z27__spirv_GroupNonUniformFMaxiifj(i32 3, i32 3, float undef, i32 8)
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br label %78
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74: ; preds = %72
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%75 = load float, ptr addrspace(3) %34, align 4
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%76 = tail call spir_func float @_Z27__spirv_GroupNonUniformFMaxiifj(i32 3, i32 3, float %75, i32 8)
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br i1 %37, label %77, label %78
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77: ; preds = %74
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store float %76, ptr addrspace(3) %34, align 4
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br label %78
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78: ; preds = %.thread1, %77, %74
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tail call spir_func void @_Z7barrierj(i32 1)
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%79 = load float, ptr addrspace(3) %6, align 4
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%80 = fsub float %51, %79
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%81 = fsub float %56, %79
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%82 = fsub float %61, %79
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%83 = fsub float %66, %79
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%84 = fmul float %80, 0x3FF7154760000000
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%85 = tail call float @llvm.exp2.f32(float %84)
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%86 = fmul float %81, 0x3FF7154760000000
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%87 = tail call float @llvm.exp2.f32(float %86)
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%88 = fmul float %82, 0x3FF7154760000000
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%89 = tail call float @llvm.exp2.f32(float %88)
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%90 = fmul float %83, 0x3FF7154760000000
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%91 = tail call float @llvm.exp2.f32(float %90)
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tail call spir_func void @_Z7barrierj(i32 1)
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%92 = fadd float %85, %87
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%93 = fadd float %89, %92
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%94 = fadd float %91, %93
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%95 = tail call spir_func float @_Z27__spirv_GroupNonUniformFAddiif(i32 3, i32 0, float %94)
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br i1 %30, label %96, label %97
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141+
96: ; preds = %78
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store float %95, ptr addrspace(3) %31, align 4
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br label %97
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97: ; preds = %96, %78
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tail call spir_func void @_Z7barrierj(i32 1)
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br i1 %32, label %99, label %.thread
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.thread: ; preds = %97
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%98 = tail call spir_func float @_Z27__spirv_GroupNonUniformFAddiifj(i32 3, i32 3, float undef, i32 8)
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br label %103
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99: ; preds = %97
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%100 = load float, ptr addrspace(3) %34, align 4
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%101 = tail call spir_func float @_Z27__spirv_GroupNonUniformFAddiifj(i32 3, i32 3, float %100, i32 8)
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br i1 %37, label %102, label %103
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102: ; preds = %99
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store float %101, ptr addrspace(3) %34, align 4
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br label %103
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103: ; preds = %.thread, %102, %99
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tail call spir_func void @_Z7barrierj(i32 1)
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%104 = load float, ptr addrspace(3) %6, align 4
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%105 = fdiv float %87, %104
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%106 = fdiv float %89, %104
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%107 = fdiv float %91, %104
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%108 = mul i32 %39, %3
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%109 = sext i32 %108 to i64
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%110 = getelementptr float, ptr addrspace(1) %0, i64 %109
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%111 = getelementptr float, ptr addrspace(1) %110, i64 %25
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%112 = getelementptr float, ptr addrspace(1) %110, i64 %26
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%113 = getelementptr float, ptr addrspace(1) %110, i64 %27
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br i1 %18, label %114, label %117
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114: ; preds = %103
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%115 = fdiv float %85, %104
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%116 = getelementptr float, ptr addrspace(1) %110, i64 %28
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store float %115, ptr addrspace(1) %116, align 4
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br label %117
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117: ; preds = %114, %103
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br i1 %19, label %118, label %119
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118: ; preds = %117
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store float %105, ptr addrspace(1) %111, align 4
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br label %119
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189+
119: ; preds = %118, %117
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br i1 %20, label %120, label %121
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120: ; preds = %119
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store float %106, ptr addrspace(1) %112, align 4
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br label %121
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196+
121: ; preds = %120, %119
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br i1 %21, label %122, label %123
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122: ; preds = %121
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store float %107, ptr addrspace(1) %113, align 4
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br label %123
202+
203+
123: ; preds = %122, %121
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%124 = add i32 %39, %11
205+
%125 = icmp slt i32 %124, %4
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br i1 %125, label %38, label %._crit_edge
207+
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._crit_edge: ; preds = %123, %7
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ret void
210+
}
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declare float @llvm.maxnum.f32(float, float)
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declare spir_func float @_Z27__spirv_GroupNonUniformFAddiifj(i32, i32, float, i32)
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declare spir_func float @_Z27__spirv_GroupNonUniformFAddiif(i32, i32, float)
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declare spir_func float @_Z27__spirv_GroupNonUniformFMaxiifj(i32, i32, float, i32)
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declare spir_func float @_Z27__spirv_GroupNonUniformFMaxiif(i32, i32, float)
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declare spir_func void @_Z7barrierj(i32)
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declare spir_func i64 @_Z12get_local_idj(i32)
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declare spir_func i64 @_Z14get_num_groupsj(i32)
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declare spir_func i64 @_Z12get_group_idj(i32)
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declare float @llvm.exp2.f32(float)

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