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Commit 6931515

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Simon Camphausen
committed
Rename lvalue_load to load
1 parent 9a75b89 commit 6931515

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17 files changed

+51
-52
lines changed

17 files changed

+51
-52
lines changed

mlir/include/mlir/Dialect/EmitC/IR/EmitC.td

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -836,7 +836,7 @@ def EmitC_LogicalOrOp : EmitC_BinaryOp<"logical_or", [CExpression]> {
836836
let assemblyFormat = "operands attr-dict `:` type(operands)";
837837
}
838838

839-
def EmitC_LValueLoadOp : EmitC_Op<"lvalue_load", [
839+
def EmitC_LoadOp : EmitC_Op<"load", [
840840
TypesMatchWith<"result type matches value type of 'operand'",
841841
"operand", "result",
842842
"::llvm::cast<LValueType>($_self).getValueType()">

mlir/include/mlir/Dialect/EmitC/IR/EmitCTypes.td

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -180,7 +180,7 @@ class EmitC_LValueOf<list<Type> allowedTypes> :
180180
ContainerType<
181181
AnyTypeOf<allowedTypes>,
182182
CPred<"::llvm::isa<::mlir::emitc::LValueType>($_self)">,
183-
"::llvm::cast<::mlir::emitc::LValueType>($_self).getValue()",
183+
"::llvm::cast<::mlir::emitc::LValueType>($_self).getValueType()",
184184
"emitc.lvalue",
185185
"::mlir::emitc::LValueType"
186186
>;

mlir/lib/Conversion/MemRefToEmitC/MemRefToEmitC.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -137,7 +137,7 @@ struct ConvertLoad final : public OpConversionPattern<memref::LoadOp> {
137137
auto subscript = rewriter.create<emitc::SubscriptOp>(
138138
op.getLoc(), arrayValue, operands.getIndices());
139139

140-
rewriter.replaceOpWithNewOp<emitc::LValueLoadOp>(op, resultTy, subscript);
140+
rewriter.replaceOpWithNewOp<emitc::LoadOp>(op, resultTy, subscript);
141141
return success();
142142
}
143143
};

mlir/lib/Conversion/SCFToEmitC/SCFToEmitC.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -85,7 +85,7 @@ SmallVector<Value> loadValues(const SmallVector<Value> &variables,
8585
PatternRewriter &rewriter, Location loc) {
8686
return llvm::map_to_vector<>(variables, [&](Value var) {
8787
Type type = cast<emitc::LValueType>(var.getType()).getValueType();
88-
return rewriter.create<emitc::LValueLoadOp>(loc, type, var).getResult();
88+
return rewriter.create<emitc::LoadOp>(loc, type, var).getResult();
8989
});
9090
}
9191

mlir/lib/Target/Cpp/TranslateToCpp.cpp

Lines changed: 8 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -384,12 +384,11 @@ static LogicalResult printOperation(CppEmitter &emitter,
384384
return emitter.emitOperand(assignOp.getValue());
385385
}
386386

387-
static LogicalResult printOperation(CppEmitter &emitter,
388-
emitc::LValueLoadOp lValueLoadOp) {
389-
if (failed(emitter.emitAssignPrefix(*lValueLoadOp)))
387+
static LogicalResult printOperation(CppEmitter &emitter, emitc::LoadOp loadOp) {
388+
if (failed(emitter.emitAssignPrefix(*loadOp)))
390389
return failure();
391390

392-
return emitter.emitOperand(lValueLoadOp.getOperand());
391+
return emitter.emitOperand(loadOp.getOperand());
393392
}
394393

395394
static LogicalResult printBinaryOperation(CppEmitter &emitter,
@@ -1551,11 +1550,11 @@ LogicalResult CppEmitter::emitOperation(Operation &op, bool trailingSemicolon) {
15511550
emitc::CallOpaqueOp, emitc::CastOp, emitc::CmpOp,
15521551
emitc::ConditionalOp, emitc::ConstantOp, emitc::DeclareFuncOp,
15531552
emitc::DivOp, emitc::ExpressionOp, emitc::ForOp, emitc::FuncOp,
1554-
emitc::GlobalOp, emitc::IfOp, emitc::IncludeOp,
1555-
emitc::LValueLoadOp, emitc::LogicalAndOp, emitc::LogicalNotOp,
1556-
emitc::LogicalOrOp, emitc::MulOp, emitc::RemOp, emitc::ReturnOp,
1557-
emitc::SubOp, emitc::SwitchOp, emitc::UnaryMinusOp,
1558-
emitc::UnaryPlusOp, emitc::VariableOp, emitc::VerbatimOp>(
1553+
emitc::GlobalOp, emitc::IfOp, emitc::IncludeOp, emitc::LoadOp,
1554+
emitc::LogicalAndOp, emitc::LogicalNotOp, emitc::LogicalOrOp,
1555+
emitc::MulOp, emitc::RemOp, emitc::ReturnOp, emitc::SubOp,
1556+
emitc::SwitchOp, emitc::UnaryMinusOp, emitc::UnaryPlusOp,
1557+
emitc::VariableOp, emitc::VerbatimOp>(
15591558
[&](auto op) { return printOperation(*this, op); })
15601559
// Func ops.
15611560
.Case<func::CallOp, func::FuncOp, func::ReturnOp>(

mlir/test/Conversion/MemRefToEmitC/memref-to-emitc.mlir

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -21,7 +21,7 @@ func.func @memref_load(%i: index, %j: index) -> f32 {
2121
%0 = memref.alloca() : memref<4x8xf32>
2222

2323
// CHECK-NEXT: %[[SUBSCRIPT:.*]] = emitc.subscript %[[ALLOCA]][%[[i]], %[[j]]] : (!emitc.array<4x8xf32>, index, index) -> !emitc.lvalue<f32>
24-
// CHECK-NEXT: %[[LOAD:.*]] = emitc.lvalue_load %[[SUBSCRIPT]] : <f32>
24+
// CHECK-NEXT: %[[LOAD:.*]] = emitc.load %[[SUBSCRIPT]] : <f32>
2525
%1 = memref.load %0[%i, %j] : memref<4x8xf32>
2626
// CHECK-NEXT: return %[[LOAD]] : f32
2727
return %1 : f32

mlir/test/Conversion/SCFToEmitC/for.mlir

Lines changed: 8 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -52,14 +52,14 @@ func.func @for_yield(%arg0 : index, %arg1 : index, %arg2 : index) -> (f32, f32)
5252
// CHECK-NEXT: emitc.assign %[[VAL_3]] : f32 to %[[VAL_5]] : <f32>
5353
// CHECK-NEXT: emitc.assign %[[VAL_4]] : f32 to %[[VAL_6]] : <f32>
5454
// CHECK-NEXT: emitc.for %[[VAL_7:.*]] = %[[VAL_0]] to %[[VAL_1]] step %[[VAL_2]] {
55-
// CHECK-NEXT: %[[VAL_8:.*]] = emitc.lvalue_load %[[VAL_5]] : <f32>
56-
// CHECK-NEXT: %[[VAL_9:.*]] = emitc.lvalue_load %[[VAL_6]] : <f32>
55+
// CHECK-NEXT: %[[VAL_8:.*]] = emitc.load %[[VAL_5]] : <f32>
56+
// CHECK-NEXT: %[[VAL_9:.*]] = emitc.load %[[VAL_6]] : <f32>
5757
// CHECK-NEXT: %[[VAL_10:.*]] = arith.addf %[[VAL_8]], %[[VAL_9]] : f32
5858
// CHECK-NEXT: emitc.assign %[[VAL_10]] : f32 to %[[VAL_5]] : <f32>
5959
// CHECK-NEXT: emitc.assign %[[VAL_10]] : f32 to %[[VAL_6]] : <f32>
6060
// CHECK-NEXT: }
61-
// CHECK-NEXT: %[[VAL_11:.*]] = emitc.lvalue_load %[[VAL_5]] : <f32>
62-
// CHECK-NEXT: %[[VAL_12:.*]] = emitc.lvalue_load %[[VAL_6]] : <f32>
61+
// CHECK-NEXT: %[[VAL_11:.*]] = emitc.load %[[VAL_5]] : <f32>
62+
// CHECK-NEXT: %[[VAL_12:.*]] = emitc.load %[[VAL_6]] : <f32>
6363
// CHECK-NEXT: return %[[VAL_11]], %[[VAL_12]] : f32, f32
6464
// CHECK-NEXT: }
6565

@@ -80,17 +80,17 @@ func.func @nested_for_yield(%arg0 : index, %arg1 : index, %arg2 : index) -> f32
8080
// CHECK-NEXT: %[[VAL_4:.*]] = "emitc.variable"() <{value = #emitc.opaque<"">}> : () -> !emitc.lvalue<f32>
8181
// CHECK-NEXT: emitc.assign %[[VAL_3]] : f32 to %[[VAL_4]] : <f32>
8282
// CHECK-NEXT: emitc.for %[[VAL_5:.*]] = %[[VAL_0]] to %[[VAL_1]] step %[[VAL_2]] {
83-
// CHECK-NEXT: %[[VAL_6:.*]] = emitc.lvalue_load %[[VAL_4]] : <f32>
83+
// CHECK-NEXT: %[[VAL_6:.*]] = emitc.load %[[VAL_4]] : <f32>
8484
// CHECK-NEXT: %[[VAL_7:.*]] = "emitc.variable"() <{value = #emitc.opaque<"">}> : () -> !emitc.lvalue<f32>
8585
// CHECK-NEXT: emitc.assign %[[VAL_6]] : f32 to %[[VAL_7]] : <f32>
8686
// CHECK-NEXT: emitc.for %[[VAL_8:.*]] = %[[VAL_0]] to %[[VAL_1]] step %[[VAL_2]] {
87-
// CHECK-NEXT: %[[VAL_9:.*]] = emitc.lvalue_load %[[VAL_7]] : <f32>
87+
// CHECK-NEXT: %[[VAL_9:.*]] = emitc.load %[[VAL_7]] : <f32>
8888
// CHECK-NEXT: %[[VAL_10:.*]] = arith.addf %[[VAL_9]], %[[VAL_9]] : f32
8989
// CHECK-NEXT: emitc.assign %[[VAL_10]] : f32 to %[[VAL_7]] : <f32>
9090
// CHECK-NEXT: }
91-
// CHECK-NEXT: %[[VAL_11:.*]] = emitc.lvalue_load %[[VAL_7]] : <f32>
91+
// CHECK-NEXT: %[[VAL_11:.*]] = emitc.load %[[VAL_7]] : <f32>
9292
// CHECK-NEXT: emitc.assign %[[VAL_11]] : f32 to %[[VAL_4]] : <f32>
9393
// CHECK-NEXT: }
94-
// CHECK-NEXT: %[[VAL_12:.*]] = emitc.lvalue_load %[[VAL_4]] : <f32>
94+
// CHECK-NEXT: %[[VAL_12:.*]] = emitc.load %[[VAL_4]] : <f32>
9595
// CHECK-NEXT: return %[[VAL_12]] : f32
9696
// CHECK-NEXT: }

mlir/test/Conversion/SCFToEmitC/if.mlir

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -66,7 +66,7 @@ func.func @test_if_yield(%arg0: i1, %arg1: f32) -> (i32, f64) {
6666
// CHECK-NEXT: emitc.assign %[[VAL_7]] : i32 to %[[VAL_3]] : <i32>
6767
// CHECK-NEXT: emitc.assign %[[VAL_8]] : f64 to %[[VAL_4]] : <f64>
6868
// CHECK-NEXT: }
69-
// CHECK-NEXT: %[[VAL_9:.*]] = emitc.lvalue_load %[[VAL_3]] : <i32>
70-
// CHECK-NEXT: %[[VAL_10:.*]] = emitc.lvalue_load %[[VAL_4]] : <f64>
69+
// CHECK-NEXT: %[[VAL_9:.*]] = emitc.load %[[VAL_3]] : <i32>
70+
// CHECK-NEXT: %[[VAL_10:.*]] = emitc.load %[[VAL_4]] : <f64>
7171
// CHECK-NEXT: return %[[VAL_9]], %[[VAL_10]] : i32, f64
7272
// CHECK-NEXT: }

mlir/test/Conversion/SCFToEmitC/switch.mlir

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -94,8 +94,8 @@ func.func @switch_one_result(%arg0 : index) {
9494
// CHECK: emitc.assign %[[VAL_7]] : i32 to %[[VAL_1]] : <i32>
9595
// CHECK: emitc.assign %[[VAL_8]] : f32 to %[[VAL_2]] : <f32>
9696
// CHECK: }
97-
// CHECK: %[[RES_1:.*]] = emitc.lvalue_load %[[VAL_1]] : <i32>
98-
// CHECK: %[[RES_2:.*]] = emitc.lvalue_load %[[VAL_2]] : <f32>
97+
// CHECK: %[[RES_1:.*]] = emitc.load %[[VAL_1]] : <i32>
98+
// CHECK: %[[RES_2:.*]] = emitc.load %[[VAL_2]] : <f32>
9999
// CHECK: return %[[RES_1]], %[[RES_2]] : i32, f32
100100
// CHECK: }
101101
func.func @switch_two_results(%arg0 : index) -> (i32, f32) {

mlir/test/Dialect/EmitC/invalid_ops.mlir

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -265,7 +265,7 @@ func.func @test_expression_illegal_op(%arg0 : i1) -> i32 {
265265
// expected-error @+1 {{'emitc.expression' op contains an unsupported operation}}
266266
%r = emitc.expression : i32 {
267267
%x = "emitc.variable"() <{value = #emitc.opaque<"">}> : () -> !emitc.lvalue<i32>
268-
%y = emitc.lvalue_load %x : <i32>
268+
%y = emitc.load %x : <i32>
269269
emitc.yield %y : i32
270270
}
271271
return %r : i32

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