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1 parent f728327 commit 696d8bbCopy full SHA for 696d8bb
llvm/test/CodeGen/RISCV/relax-per-target-feature.ll
@@ -11,6 +11,7 @@ declare dso_local i32 @ext(i32)
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; CHECK-NEXT: c.li a0, 31
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; CHECK-NEXT: auipc t1, 0
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; CHECK-NEXT: R_RISCV_CALL_PLT ext
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+; CHECK-NEXT: R_RISCV_RELAX *ABS*
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; CHECK-NEXT: jalr zero, 0(t1)
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define dso_local i32 @f() #0 {
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entry:
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