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1 parent 2477b4a commit 69b1ea2

15 files changed

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-393311
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llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.128bit.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -4,7 +4,7 @@
44
; RUN: llc -mtriple=amdgcn -mcpu=tonga < %s | FileCheck -check-prefix=VI %s
55
; RUN: llc -mtriple=amdgcn -mcpu=gfx900 < %s | FileCheck -check-prefix=GFX9 %s
66
; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -mattr=+real-true16 < %s | FileCheck -check-prefixes=GFX11,GFX11-TRUE16 %s
7-
; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -mattr=-real-true16 < %s | FileCheck -check-prefixes=GFX11,GFX11-FAKE16 %str=-real-true16 < %s | FileCheck -check-prefixes=GFX11,GFX11-FAKE16 %s
7+
; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -mattr=-real-true16 < %s | FileCheck -check-prefixes=GFX11,GFX11-FAKE16 %s
88

99
define <4 x float> @bitcast_v4i32_to_v4f32(<4 x i32> %a, i32 %b) {
1010
; SI-LABEL: bitcast_v4i32_to_v4f32:

llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.16bit.ll

Lines changed: 6 additions & 17 deletions
Original file line numberDiff line numberDiff line change
@@ -115,26 +115,16 @@ define i16 @bitcast_f16_to_i16(half %a, i32 %b) {
115115
; SI-LABEL: bitcast_f16_to_i16:
116116
; SI: ; %bb.0:
117117
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
118-
; SI-NEXT: v_cvt_f16_f32_e32 v2, v0
119-
; SI-NEXT: v_mov_b32_e32 v0, 0
118+
; SI-NEXT: v_cvt_f16_f32_e32 v0, v0
120119
; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v1
121120
; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc
122121
; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
123-
; SI-NEXT: s_cbranch_execnz .LBB1_3
124-
; SI-NEXT: ; %bb.1: ; %Flow
125-
; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
126-
; SI-NEXT: s_cbranch_execnz .LBB1_4
127-
; SI-NEXT: .LBB1_2: ; %end
128-
; SI-NEXT: s_or_b64 exec, exec, s[4:5]
129-
; SI-NEXT: s_setpc_b64 s[30:31]
130-
; SI-NEXT: .LBB1_3: ; %cmp.false
131-
; SI-NEXT: v_mov_b32_e32 v0, v2
132122
; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
133-
; SI-NEXT: s_cbranch_execz .LBB1_2
134-
; SI-NEXT: .LBB1_4: ; %cmp.true
135-
; SI-NEXT: v_cvt_f32_f16_e32 v0, v2
123+
; SI-NEXT: ; %bb.1: ; %cmp.true
124+
; SI-NEXT: v_cvt_f32_f16_e32 v0, v0
136125
; SI-NEXT: v_add_f32_e32 v0, 0x38000000, v0
137126
; SI-NEXT: v_cvt_f16_f32_e32 v0, v0
127+
; SI-NEXT: ; %bb.2: ; %end
138128
; SI-NEXT: s_or_b64 exec, exec, s[4:5]
139129
; SI-NEXT: s_setpc_b64 s[30:31]
140130
;
@@ -314,10 +304,9 @@ define i16 @bitcast_bf16_to_i16(bfloat %a, i32 %b) {
314304
; SI-LABEL: bitcast_bf16_to_i16:
315305
; SI: ; %bb.0:
316306
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
317-
; SI-NEXT: v_mov_b32_e32 v2, v0
318-
; SI-NEXT: v_mov_b32_e32 v0, 0
319307
; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v1
320-
; SI-NEXT: v_mul_f32_e32 v1, 1.0, v2
308+
; SI-NEXT: v_mul_f32_e32 v1, 1.0, v0
309+
; SI-NEXT: ; implicit-def: $vgpr0
321310
; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc
322311
; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
323312
; SI-NEXT: s_cbranch_execnz .LBB3_3

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