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Add tests for odd sizes
Fix variable case
1 parent 9a21131 commit 6a0d82b

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2 files changed

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2 files changed

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‎llvm/lib/Target/X86/X86ISelLowering.cpp‎

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Original file line numberDiff line numberDiff line change
@@ -57980,6 +57980,10 @@ static SDValue matchVPMADD52(SDNode *N, SelectionDAG &DAG, const SDLoc &DL,
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VT.getSizeInBits() < 512)
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return SDValue();
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const auto TotalSize = VT.getSizeInBits();
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if (TotalSize < 128 || !isPowerOf2_64(TotalSize))
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return SDValue();
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SDValue X, Y, Acc;
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if (!sd_match(N, m_Add(m_Mul(m_Value(X), m_Value(Y)), m_Value(Acc))))
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return SDValue();

‎llvm/test/CodeGen/X86/ifma-combine-vpmadd52.ll‎

Lines changed: 206 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -351,3 +351,209 @@ define <16 x i64> @test_1024_combine_split(<16 x i64> %x, <16 x i64> %y, <16 x i
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%res = add <16 x i64> %z, %mul
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ret <16 x i64> %res
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}
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define <1 x i64> @test_not_i1(<1 x i64> %x, <1 x i64> %y, <1 x i64> %z) {
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; X64-LABEL: test_not_i1:
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; X64: # %bb.0:
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; X64-NEXT: andl $67108863, %edi # imm = 0x3FFFFFF
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; X64-NEXT: imulq %rdi, %rdi
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; X64-NEXT: leaq (%rdi,%rdx), %rax
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; X64-NEXT: retq
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%x_masked = and <1 x i64> %x, splat (i64 67108863)
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%y_masked = and <1 x i64> %x, splat (i64 67108863)
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%mul = mul <1 x i64> %x_masked, %y_masked
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%res = add <1 x i64> %mul, %z
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ret <1 x i64> %res
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}
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define <3 x i64> @test_i3(<3 x i64> %x, <3 x i64> %y, <3 x i64> %z) {
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; AVX-LABEL: test_i3:
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; AVX: # %bb.0:
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; AVX-NEXT: vpbroadcastq {{.*#+}} ymm1 = [67108863,67108863,67108863,67108863]
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; AVX-NEXT: vpand %ymm1, %ymm0, %ymm0
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; AVX-NEXT: vpmuludq %ymm0, %ymm0, %ymm0
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; AVX-NEXT: vpaddq %ymm2, %ymm0, %ymm0
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; AVX-NEXT: retq
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;
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; AVX512-NOVL-LABEL: test_i3:
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; AVX512-NOVL: # %bb.0:
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; AVX512-NOVL-NEXT: vpbroadcastq {{.*#+}} ymm1 = [67108863,67108863,67108863,67108863]
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; AVX512-NOVL-NEXT: vpand %ymm1, %ymm0, %ymm0
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; AVX512-NOVL-NEXT: vpmuludq %ymm0, %ymm0, %ymm0
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; AVX512-NOVL-NEXT: vpaddq %ymm2, %ymm0, %ymm0
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; AVX512-NOVL-NEXT: retq
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;
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; AVX512VL-LABEL: test_i3:
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; AVX512VL: # %bb.0:
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; AVX512VL-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %ymm0, %ymm0
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; AVX512VL-NEXT: vpmuludq %ymm0, %ymm0, %ymm0
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; AVX512VL-NEXT: vpaddq %ymm2, %ymm0, %ymm0
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; AVX512VL-NEXT: retq
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%x_masked = and <3 x i64> %x, splat (i64 67108863)
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%y_masked = and <3 x i64> %x, splat (i64 67108863)
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%mul = mul <3 x i64> %x_masked, %y_masked
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%res = add <3 x i64> %mul, %z
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ret <3 x i64> %res
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}
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define <5 x i64> @test_i5(<5 x i64> %x, <5 x i64> %y, <5 x i64> %z) {
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; AVX-LABEL: test_i5:
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; AVX: # %bb.0:
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; AVX-NEXT: movq %rdi, %rax
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; AVX-NEXT: vmovq %r8, %xmm0
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; AVX-NEXT: vmovq %rcx, %xmm1
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; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]
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; AVX-NEXT: vmovq %rdx, %xmm1
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; AVX-NEXT: vmovq %rsi, %xmm2
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; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm1 = xmm2[0],xmm1[0]
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; AVX-NEXT: vinserti128 $1, %xmm0, %ymm1, %ymm0
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; AVX-NEXT: vmovq {{.*#+}} xmm1 = mem[0],zero
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; AVX-NEXT: vmovdqu {{[0-9]+}}(%rsp), %ymm2
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; AVX-NEXT: vpbroadcastq {{.*#+}} ymm3 = [67108863,67108863,67108863,67108863]
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; AVX-NEXT: vpand %ymm3, %ymm0, %ymm0
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; AVX-NEXT: movl $67108863, %ecx # imm = 0x3FFFFFF
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; AVX-NEXT: vmovq %rcx, %xmm3
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; AVX-NEXT: vmovq %r9, %xmm4
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; AVX-NEXT: vpand %xmm3, %xmm4, %xmm3
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; AVX-NEXT: vpsrlq $32, %xmm3, %xmm4
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; AVX-NEXT: vpmuludq %xmm4, %xmm3, %xmm4
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; AVX-NEXT: vpsllq $33, %xmm4, %xmm4
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; AVX-NEXT: vpmuludq %xmm3, %xmm3, %xmm3
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; AVX-NEXT: vpaddq %xmm1, %xmm3, %xmm1
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; AVX-NEXT: vpaddq %xmm4, %xmm1, %xmm1
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; AVX-NEXT: {vex} vpmadd52luq %ymm0, %ymm0, %ymm2
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; AVX-NEXT: vmovdqa %ymm2, (%rdi)
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; AVX-NEXT: vmovq %xmm1, 32(%rdi)
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; AVX-NEXT: vzeroupper
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; AVX-NEXT: retq
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;
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; AVX512-LABEL: test_i5:
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; AVX512: # %bb.0:
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; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to8}, %zmm0, %zmm0
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; AVX512-NEXT: vpmuludq %zmm0, %zmm0, %zmm0
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; AVX512-NEXT: vpaddq %zmm2, %zmm0, %zmm0
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; AVX512-NEXT: retq
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%x_masked = and <5 x i64> %x, splat (i64 67108863)
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%y_masked = and <5 x i64> %x, splat (i64 67108863)
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%mul = mul <5 x i64> %x_masked, %y_masked
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%res = add <5 x i64> %mul, %z
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ret <5 x i64> %res
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}
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define <6 x i64> @test_i6(<6 x i64> %x, <6 x i64> %y, <6 x i64> %z) {
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; AVX-LABEL: test_i6:
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; AVX: # %bb.0:
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; AVX-NEXT: movq %rdi, %rax
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; AVX-NEXT: vmovq %r8, %xmm0
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; AVX-NEXT: vmovq %rcx, %xmm1
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; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]
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; AVX-NEXT: vmovq %rdx, %xmm1
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; AVX-NEXT: vmovq %rsi, %xmm2
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; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm1 = xmm2[0],xmm1[0]
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; AVX-NEXT: vinserti128 $1, %xmm0, %ymm1, %ymm0
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; AVX-NEXT: vmovdqu {{[0-9]+}}(%rsp), %ymm1
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; AVX-NEXT: vpbroadcastq {{.*#+}} ymm2 = [67108863,67108863,67108863,67108863]
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; AVX-NEXT: vpand %ymm2, %ymm0, %ymm0
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; AVX-NEXT: {vex} vpmadd52luq %ymm0, %ymm0, %ymm1
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; AVX-NEXT: vmovq %r9, %xmm0
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; AVX-NEXT: vmovq {{.*#+}} xmm3 = mem[0],zero
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; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm3[0]
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; AVX-NEXT: vpand %xmm2, %xmm0, %xmm0
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; AVX-NEXT: vpmuldq %xmm0, %xmm0, %xmm0
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; AVX-NEXT: vpaddq {{[0-9]+}}(%rsp), %xmm0, %xmm0
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; AVX-NEXT: vmovdqa %xmm0, 32(%rdi)
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; AVX-NEXT: vmovdqa %ymm1, (%rdi)
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; AVX-NEXT: vzeroupper
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; AVX-NEXT: retq
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;
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; AVX512-LABEL: test_i6:
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; AVX512: # %bb.0:
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; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to8}, %zmm0, %zmm0
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; AVX512-NEXT: vpmuludq %zmm0, %zmm0, %zmm0
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; AVX512-NEXT: vpaddq %zmm2, %zmm0, %zmm0
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; AVX512-NEXT: retq
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%x_masked = and <6 x i64> %x, splat (i64 67108863)
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%y_masked = and <6 x i64> %x, splat (i64 67108863)
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%mul = mul <6 x i64> %x_masked, %y_masked
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%res = add <6 x i64> %mul, %z
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ret <6 x i64> %res
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}
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define <9 x i64> @test_i9(<9 x i64> %x, <9 x i64> %y, <9 x i64> %z) {
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; AVX-LABEL: test_i9:
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; AVX: # %bb.0:
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; AVX-NEXT: movq %rdi, %rax
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; AVX-NEXT: vmovq %r8, %xmm0
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; AVX-NEXT: vmovq %rcx, %xmm1
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; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]
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; AVX-NEXT: vmovq %rdx, %xmm1
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; AVX-NEXT: vmovq %rsi, %xmm2
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; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm1 = xmm2[0],xmm1[0]
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; AVX-NEXT: vinserti128 $1, %xmm0, %ymm1, %ymm0
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; AVX-NEXT: vmovq %r9, %xmm1
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; AVX-NEXT: vmovq {{.*#+}} xmm2 = mem[0],zero
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; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm2[0]
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; AVX-NEXT: vinserti128 $1, {{[0-9]+}}(%rsp), %ymm1, %ymm1
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; AVX-NEXT: vmovq {{.*#+}} xmm2 = mem[0],zero
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; AVX-NEXT: vmovdqu {{[0-9]+}}(%rsp), %ymm3
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; AVX-NEXT: vmovdqu {{[0-9]+}}(%rsp), %ymm4
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; AVX-NEXT: vpbroadcastq {{.*#+}} ymm5 = [67108863,67108863,67108863,67108863]
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; AVX-NEXT: vpand %ymm5, %ymm0, %ymm0
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; AVX-NEXT: vpand %ymm5, %ymm1, %ymm1
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; AVX-NEXT: movl $67108863, %ecx # imm = 0x3FFFFFF
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; AVX-NEXT: vmovq %rcx, %xmm5
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; AVX-NEXT: vmovq {{.*#+}} xmm6 = mem[0],zero
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; AVX-NEXT: vpand %xmm5, %xmm6, %xmm5
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; AVX-NEXT: vpsrlq $32, %xmm5, %xmm6
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; AVX-NEXT: vpmuludq %xmm6, %xmm5, %xmm6
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; AVX-NEXT: vpsllq $33, %xmm6, %xmm6
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; AVX-NEXT: vpmuludq %xmm5, %xmm5, %xmm5
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; AVX-NEXT: vpaddq %xmm2, %xmm5, %xmm2
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; AVX-NEXT: vpaddq %xmm6, %xmm2, %xmm2
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; AVX-NEXT: {vex} vpmadd52luq %ymm0, %ymm0, %ymm4
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; AVX-NEXT: {vex} vpmadd52luq %ymm1, %ymm1, %ymm3
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; AVX-NEXT: vmovdqa %ymm3, 32(%rdi)
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; AVX-NEXT: vmovdqa %ymm4, (%rdi)
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; AVX-NEXT: vmovq %xmm2, 64(%rdi)
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; AVX-NEXT: vzeroupper
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; AVX-NEXT: retq
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;
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; AVX512-LABEL: test_i9:
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; AVX512: # %bb.0:
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; AVX512-NEXT: movq %rdi, %rax
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; AVX512-NEXT: vmovq %r8, %xmm0
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; AVX512-NEXT: vmovq %rcx, %xmm1
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; AVX512-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]
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; AVX512-NEXT: vmovq %rdx, %xmm1
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; AVX512-NEXT: vmovq %rsi, %xmm2
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; AVX512-NEXT: vpunpcklqdq {{.*#+}} xmm1 = xmm2[0],xmm1[0]
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; AVX512-NEXT: vinserti128 $1, %xmm0, %ymm1, %ymm0
531+
; AVX512-NEXT: vmovq %r9, %xmm1
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; AVX512-NEXT: vmovq {{.*#+}} xmm2 = mem[0],zero
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; AVX512-NEXT: vpunpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm2[0]
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; AVX512-NEXT: vinserti128 $1, {{[0-9]+}}(%rsp), %ymm1, %ymm1
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; AVX512-NEXT: vinserti64x4 $1, %ymm1, %zmm0, %zmm0
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; AVX512-NEXT: vmovq {{.*#+}} xmm1 = mem[0],zero
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; AVX512-NEXT: vmovdqu64 {{[0-9]+}}(%rsp), %zmm2
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; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to8}, %zmm0, %zmm0
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; AVX512-NEXT: movl $67108863, %ecx # imm = 0x3FFFFFF
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; AVX512-NEXT: vmovq %rcx, %xmm3
541+
; AVX512-NEXT: vmovq {{.*#+}} xmm4 = mem[0],zero
542+
; AVX512-NEXT: vpand %xmm3, %xmm4, %xmm3
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; AVX512-NEXT: vpsrlq $32, %xmm3, %xmm4
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; AVX512-NEXT: vpmuludq %xmm4, %xmm3, %xmm4
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; AVX512-NEXT: vpsllq $33, %xmm4, %xmm4
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; AVX512-NEXT: vpmuludq %xmm3, %xmm3, %xmm3
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; AVX512-NEXT: vpaddq %xmm1, %xmm3, %xmm1
548+
; AVX512-NEXT: vpaddq %xmm4, %xmm1, %xmm1
549+
; AVX512-NEXT: vpmadd52luq %zmm0, %zmm0, %zmm2
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; AVX512-NEXT: vmovq %xmm1, 64(%rdi)
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; AVX512-NEXT: vmovdqa64 %zmm2, (%rdi)
552+
; AVX512-NEXT: vzeroupper
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; AVX512-NEXT: retq
554+
%x_masked = and <9 x i64> %x, splat (i64 67108863)
555+
%y_masked = and <9 x i64> %x, splat (i64 67108863)
556+
%mul = mul <9 x i64> %x_masked, %y_masked
557+
%res = add <9 x i64> %mul, %z
558+
ret <9 x i64> %res
559+
}

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