@@ -2703,7 +2703,7 @@ bool llvm::isIntS34Immediate(SDNode *N, int64_t &Imm) {
27032703 if (!isa<ConstantSDNode>(N))
27042704 return false;
27052705
2706- Imm = (int64_t)N->getAsZExtVal ();
2706+ Imm = (int64_t)cast<ConstantSDNode>(N)->getSExtValue ();
27072707 return isInt<34>(Imm);
27082708}
27092709bool llvm::isIntS34Immediate(SDValue Op, int64_t &Imm) {
@@ -2925,7 +2925,7 @@ bool PPCTargetLowering::SelectAddressRegImm34(SDValue N, SDValue &Disp,
29252925 if (N.getOpcode() == ISD::ADD) {
29262926 if (!isIntS34Immediate(N.getOperand(1), Imm))
29272927 return false;
2928- Disp = DAG.getTargetConstant (Imm, dl, N.getValueType());
2928+ Disp = DAG.getSignedTargetConstant (Imm, dl, N.getValueType());
29292929 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(N.getOperand(0)))
29302930 Base = DAG.getTargetFrameIndex(FI->getIndex(), N.getValueType());
29312931 else
@@ -2946,12 +2946,12 @@ bool PPCTargetLowering::SelectAddressRegImm34(SDValue N, SDValue &Disp,
29462946 Base = DAG.getTargetFrameIndex(FI->getIndex(), N.getValueType());
29472947 else
29482948 Base = N.getOperand(0);
2949- Disp = DAG.getTargetConstant (Imm, dl, N.getValueType());
2949+ Disp = DAG.getSignedTargetConstant (Imm, dl, N.getValueType());
29502950 return true;
29512951 }
29522952
29532953 if (isIntS34Immediate(N, Imm)) { // If the address is a 34-bit const.
2954- Disp = DAG.getTargetConstant (Imm, dl, N.getValueType());
2954+ Disp = DAG.getSignedTargetConstant (Imm, dl, N.getValueType());
29552955 Base = DAG.getRegister(PPC::ZERO8, N.getValueType());
29562956 return true;
29572957 }
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