Fix typo QuarterTile in 1x2

Author: virginia-cangelosi

llvm/include/llvm/IR/IntrinsicsAArch64.td

@@ -3086,40 +3086,40 @@ let TargetPrefix = "aarch64" in {
     }
   }
 
-  class SME_OuterProduct_QuaterTile_Multi
+  class SME_OuterProduct_QuarterTile_Single_Multi
       : DefaultAttrsIntrinsic<[],
           [llvm_i32_ty,
           llvm_anyvector_ty,
           LLVMMatchType<0>,
           LLVMMatchType<0>], [ImmArg<ArgIndex<0>>]>;
-  def int_aarch64_sme_mop4a_wide_1x2 : SME_OuterProduct_QuaterTile_Multi;
-  def int_aarch64_sme_mop4s_wide_1x2 : SME_OuterProduct_QuaterTile_Multi;
-  def int_aarch64_sme_mop4a_1x2 : SME_OuterProduct_QuaterTile_Multi;
-  def int_aarch64_sme_mop4s_1x2 : SME_OuterProduct_QuaterTile_Multi;
-  def int_aarch64_sme_smop4a_wide_1x2 : SME_OuterProduct_QuaterTile_Multi;
-  def int_aarch64_sme_smop4s_wide_1x2 : SME_OuterProduct_QuaterTile_Multi;
-  def int_aarch64_sme_smop4a_1x2 : SME_OuterProduct_QuaterTile_Multi;
-  def int_aarch64_sme_smop4s_1x2 : SME_OuterProduct_QuaterTile_Multi;
-  def int_aarch64_sme_umop4a_wide_1x2 : SME_OuterProduct_QuaterTile_Multi;
-  def int_aarch64_sme_umop4s_wide_1x2 : SME_OuterProduct_QuaterTile_Multi;
-  def int_aarch64_sme_umop4a_1x2 : SME_OuterProduct_QuaterTile_Multi;
-  def int_aarch64_sme_umop4s_1x2 : SME_OuterProduct_QuaterTile_Multi;
-  def int_aarch64_sme_sumop4a_wide_1x2 : SME_OuterProduct_QuaterTile_Multi;
-  def int_aarch64_sme_sumop4s_wide_1x2 : SME_OuterProduct_QuaterTile_Multi;
-  def int_aarch64_sme_sumop4a_1x2 : SME_OuterProduct_QuaterTile_Multi;
-  def int_aarch64_sme_sumop4s_1x2 : SME_OuterProduct_QuaterTile_Multi;
-  def int_aarch64_sme_usmop4a_wide_1x2 : SME_OuterProduct_QuaterTile_Multi;
-  def int_aarch64_sme_usmop4s_wide_1x2 : SME_OuterProduct_QuaterTile_Multi;
-  def int_aarch64_sme_usmop4a_1x2 : SME_OuterProduct_QuaterTile_Multi;
-  def int_aarch64_sme_usmop4s_1x2 : SME_OuterProduct_QuaterTile_Multi;
-  def int_aarch64_sme_smop4a_za64_wide_1x2 : SME_OuterProduct_QuaterTile_Multi;
-  def int_aarch64_sme_smop4s_za64_wide_1x2 : SME_OuterProduct_QuaterTile_Multi;
-  def int_aarch64_sme_umop4a_za64_wide_1x2 : SME_OuterProduct_QuaterTile_Multi;
-  def int_aarch64_sme_umop4s_za64_wide_1x2 : SME_OuterProduct_QuaterTile_Multi;
-  def int_aarch64_sme_sumop4a_za64_wide_1x2 : SME_OuterProduct_QuaterTile_Multi;
-  def int_aarch64_sme_sumop4s_za64_wide_1x2 : SME_OuterProduct_QuaterTile_Multi;
-  def int_aarch64_sme_usmop4a_za64_wide_1x2 : SME_OuterProduct_QuaterTile_Multi;
-  def int_aarch64_sme_usmop4s_za64_wide_1x2 : SME_OuterProduct_QuaterTile_Multi;
+  def int_aarch64_sme_mop4a_wide_1x2 : SME_OuterProduct_QuarterTile_Single_Multi;
+  def int_aarch64_sme_mop4s_wide_1x2 : SME_OuterProduct_QuarterTile_Single_Multi;
+  def int_aarch64_sme_mop4a_1x2 : SME_OuterProduct_QuarterTile_Single_Multi;
+  def int_aarch64_sme_mop4s_1x2 : SME_OuterProduct_QuarterTile_Single_Multi;
+  def int_aarch64_sme_smop4a_wide_1x2 : SME_OuterProduct_QuarterTile_Single_Multi;
+  def int_aarch64_sme_smop4s_wide_1x2 : SME_OuterProduct_QuarterTile_Single_Multi;
+  def int_aarch64_sme_smop4a_1x2 : SME_OuterProduct_QuarterTile_Single_Multi;
+  def int_aarch64_sme_smop4s_1x2 : SME_OuterProduct_QuarterTile_Single_Multi;
+  def int_aarch64_sme_umop4a_wide_1x2 : SME_OuterProduct_QuarterTile_Single_Multi;
+  def int_aarch64_sme_umop4s_wide_1x2 : SME_OuterProduct_QuarterTile_Single_Multi;
+  def int_aarch64_sme_umop4a_1x2 : SME_OuterProduct_QuarterTile_Single_Multi;
+  def int_aarch64_sme_umop4s_1x2 : SME_OuterProduct_QuarterTile_Single_Multi;
+  def int_aarch64_sme_sumop4a_wide_1x2 : SME_OuterProduct_QuarterTile_Single_Multi;
+  def int_aarch64_sme_sumop4s_wide_1x2 : SME_OuterProduct_QuarterTile_Single_Multi;
+  def int_aarch64_sme_sumop4a_1x2 : SME_OuterProduct_QuarterTile_Single_Multi;
+  def int_aarch64_sme_sumop4s_1x2 : SME_OuterProduct_QuarterTile_Single_Multi;
+  def int_aarch64_sme_usmop4a_wide_1x2 : SME_OuterProduct_QuarterTile_Single_Multi;
+  def int_aarch64_sme_usmop4s_wide_1x2 : SME_OuterProduct_QuarterTile_Single_Multi;
+  def int_aarch64_sme_usmop4a_1x2 : SME_OuterProduct_QuarterTile_Single_Multi;
+  def int_aarch64_sme_usmop4s_1x2 : SME_OuterProduct_QuarterTile_Single_Multi;
+  def int_aarch64_sme_smop4a_za64_wide_1x2 : SME_OuterProduct_QuarterTile_Single_Multi;
+  def int_aarch64_sme_smop4s_za64_wide_1x2 : SME_OuterProduct_QuarterTile_Single_Multi;
+  def int_aarch64_sme_umop4a_za64_wide_1x2 : SME_OuterProduct_QuarterTile_Single_Multi;
+  def int_aarch64_sme_umop4s_za64_wide_1x2 : SME_OuterProduct_QuarterTile_Single_Multi;
+  def int_aarch64_sme_sumop4a_za64_wide_1x2 : SME_OuterProduct_QuarterTile_Single_Multi;
+  def int_aarch64_sme_sumop4s_za64_wide_1x2 : SME_OuterProduct_QuarterTile_Single_Multi;
+  def int_aarch64_sme_usmop4a_za64_wide_1x2 : SME_OuterProduct_QuarterTile_Single_Multi;
+  def int_aarch64_sme_usmop4s_za64_wide_1x2 : SME_OuterProduct_QuarterTile_Single_Multi;
 
   class SME_AddVectorToTile_Intrinsic
       : DefaultAttrsIntrinsic<[],