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[RISCV] Prioritize zext.h/zext.w over XTheadBb th.extu. (#154186)
Fixes #154125.
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3 files changed

+444
-230
lines changed

3 files changed

+444
-230
lines changed

‎llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1691,7 +1691,9 @@ void RISCVDAGToDAGISel::Select(SDNode *Node) {
16911691
// available.
16921692
// Transform (and x, C1)
16931693
// -> (<bfextract> x, msb, lsb)
1694-
if (isMask_64(C1) && !isInt<12>(N1C->getSExtValue())) {
1694+
if (isMask_64(C1) && !isInt<12>(N1C->getSExtValue()) &&
1695+
!(C1 == 0xffff && Subtarget->hasStdExtZbb()) &&
1696+
!(C1 == 0xffffffff && Subtarget->hasStdExtZba())) {
16951697
const unsigned Msb = llvm::bit_width(C1) - 1;
16961698
if (tryUnsignedBitfieldExtract(Node, DL, VT, N0, Msb, 0))
16971699
return;

‎llvm/test/CodeGen/RISCV/rv32xtheadbb.ll

Lines changed: 178 additions & 95 deletions
Original file line numberDiff line numberDiff line change
@@ -2,7 +2,9 @@
22
; RUN: llc -mtriple=riscv32 -verify-machineinstrs < %s \
33
; RUN: | FileCheck %s -check-prefixes=RV32I
44
; RUN: llc -mtriple=riscv32 -mattr=+xtheadbb -verify-machineinstrs < %s \
5-
; RUN: | FileCheck %s -check-prefixes=RV32XTHEADBB
5+
; RUN: | FileCheck %s -check-prefixes=RV32XTHEADBB,RV32XTHEADBB-NOB
6+
; RUN: llc -mtriple=riscv32 -mattr=+xtheadbb,+b -verify-machineinstrs < %s \
7+
; RUN: | FileCheck %s -check-prefixes=RV32XTHEADBB,RV32XTHEADBB-B
68

79
declare i32 @llvm.ctlz.i32(i32, i1)
810

@@ -48,10 +50,15 @@ define i32 @ctlz_i32(i32 %a) nounwind {
4850
; RV32I-NEXT: li a0, 32
4951
; RV32I-NEXT: ret
5052
;
51-
; RV32XTHEADBB-LABEL: ctlz_i32:
52-
; RV32XTHEADBB: # %bb.0:
53-
; RV32XTHEADBB-NEXT: th.ff1 a0, a0
54-
; RV32XTHEADBB-NEXT: ret
53+
; RV32XTHEADBB-NOB-LABEL: ctlz_i32:
54+
; RV32XTHEADBB-NOB: # %bb.0:
55+
; RV32XTHEADBB-NOB-NEXT: th.ff1 a0, a0
56+
; RV32XTHEADBB-NOB-NEXT: ret
57+
;
58+
; RV32XTHEADBB-B-LABEL: ctlz_i32:
59+
; RV32XTHEADBB-B: # %bb.0:
60+
; RV32XTHEADBB-B-NEXT: clz a0, a0
61+
; RV32XTHEADBB-B-NEXT: ret
5562
%1 = call i32 @llvm.ctlz.i32(i32 %a, i1 false)
5663
ret i32 %1
5764
}
@@ -135,18 +142,31 @@ define i64 @ctlz_i64(i64 %a) nounwind {
135142
; RV32I-NEXT: li a1, 0
136143
; RV32I-NEXT: ret
137144
;
138-
; RV32XTHEADBB-LABEL: ctlz_i64:
139-
; RV32XTHEADBB: # %bb.0:
140-
; RV32XTHEADBB-NEXT: bnez a1, .LBB1_2
141-
; RV32XTHEADBB-NEXT: # %bb.1:
142-
; RV32XTHEADBB-NEXT: th.ff1 a0, a0
143-
; RV32XTHEADBB-NEXT: addi a0, a0, 32
144-
; RV32XTHEADBB-NEXT: li a1, 0
145-
; RV32XTHEADBB-NEXT: ret
146-
; RV32XTHEADBB-NEXT: .LBB1_2:
147-
; RV32XTHEADBB-NEXT: th.ff1 a0, a1
148-
; RV32XTHEADBB-NEXT: li a1, 0
149-
; RV32XTHEADBB-NEXT: ret
145+
; RV32XTHEADBB-NOB-LABEL: ctlz_i64:
146+
; RV32XTHEADBB-NOB: # %bb.0:
147+
; RV32XTHEADBB-NOB-NEXT: bnez a1, .LBB1_2
148+
; RV32XTHEADBB-NOB-NEXT: # %bb.1:
149+
; RV32XTHEADBB-NOB-NEXT: th.ff1 a0, a0
150+
; RV32XTHEADBB-NOB-NEXT: addi a0, a0, 32
151+
; RV32XTHEADBB-NOB-NEXT: li a1, 0
152+
; RV32XTHEADBB-NOB-NEXT: ret
153+
; RV32XTHEADBB-NOB-NEXT: .LBB1_2:
154+
; RV32XTHEADBB-NOB-NEXT: th.ff1 a0, a1
155+
; RV32XTHEADBB-NOB-NEXT: li a1, 0
156+
; RV32XTHEADBB-NOB-NEXT: ret
157+
;
158+
; RV32XTHEADBB-B-LABEL: ctlz_i64:
159+
; RV32XTHEADBB-B: # %bb.0:
160+
; RV32XTHEADBB-B-NEXT: bnez a1, .LBB1_2
161+
; RV32XTHEADBB-B-NEXT: # %bb.1:
162+
; RV32XTHEADBB-B-NEXT: clz a0, a0
163+
; RV32XTHEADBB-B-NEXT: addi a0, a0, 32
164+
; RV32XTHEADBB-B-NEXT: li a1, 0
165+
; RV32XTHEADBB-B-NEXT: ret
166+
; RV32XTHEADBB-B-NEXT: .LBB1_2:
167+
; RV32XTHEADBB-B-NEXT: clz a0, a1
168+
; RV32XTHEADBB-B-NEXT: li a1, 0
169+
; RV32XTHEADBB-B-NEXT: ret
150170
%1 = call i64 @llvm.ctlz.i64(i64 %a, i1 false)
151171
ret i64 %1
152172
}
@@ -177,20 +197,25 @@ define i32 @cttz_i32(i32 %a) nounwind {
177197
; RV32I-NEXT: li a0, 32
178198
; RV32I-NEXT: ret
179199
;
180-
; RV32XTHEADBB-LABEL: cttz_i32:
181-
; RV32XTHEADBB: # %bb.0:
182-
; RV32XTHEADBB-NEXT: beqz a0, .LBB2_2
183-
; RV32XTHEADBB-NEXT: # %bb.1: # %cond.false
184-
; RV32XTHEADBB-NEXT: addi a1, a0, -1
185-
; RV32XTHEADBB-NEXT: not a0, a0
186-
; RV32XTHEADBB-NEXT: and a0, a0, a1
187-
; RV32XTHEADBB-NEXT: th.ff1 a0, a0
188-
; RV32XTHEADBB-NEXT: li a1, 32
189-
; RV32XTHEADBB-NEXT: sub a0, a1, a0
190-
; RV32XTHEADBB-NEXT: ret
191-
; RV32XTHEADBB-NEXT: .LBB2_2:
192-
; RV32XTHEADBB-NEXT: li a0, 32
193-
; RV32XTHEADBB-NEXT: ret
200+
; RV32XTHEADBB-NOB-LABEL: cttz_i32:
201+
; RV32XTHEADBB-NOB: # %bb.0:
202+
; RV32XTHEADBB-NOB-NEXT: beqz a0, .LBB2_2
203+
; RV32XTHEADBB-NOB-NEXT: # %bb.1: # %cond.false
204+
; RV32XTHEADBB-NOB-NEXT: addi a1, a0, -1
205+
; RV32XTHEADBB-NOB-NEXT: not a0, a0
206+
; RV32XTHEADBB-NOB-NEXT: and a0, a0, a1
207+
; RV32XTHEADBB-NOB-NEXT: th.ff1 a0, a0
208+
; RV32XTHEADBB-NOB-NEXT: li a1, 32
209+
; RV32XTHEADBB-NOB-NEXT: sub a0, a1, a0
210+
; RV32XTHEADBB-NOB-NEXT: ret
211+
; RV32XTHEADBB-NOB-NEXT: .LBB2_2:
212+
; RV32XTHEADBB-NOB-NEXT: li a0, 32
213+
; RV32XTHEADBB-NOB-NEXT: ret
214+
;
215+
; RV32XTHEADBB-B-LABEL: cttz_i32:
216+
; RV32XTHEADBB-B: # %bb.0:
217+
; RV32XTHEADBB-B-NEXT: ctz a0, a0
218+
; RV32XTHEADBB-B-NEXT: ret
194219
%1 = call i32 @llvm.cttz.i32(i32 %a, i1 false)
195220
ret i32 %1
196221
}
@@ -252,33 +277,46 @@ define i64 @cttz_i64(i64 %a) nounwind {
252277
; RV32I-NEXT: addi sp, sp, 32
253278
; RV32I-NEXT: ret
254279
;
255-
; RV32XTHEADBB-LABEL: cttz_i64:
256-
; RV32XTHEADBB: # %bb.0:
257-
; RV32XTHEADBB-NEXT: or a2, a0, a1
258-
; RV32XTHEADBB-NEXT: beqz a2, .LBB3_3
259-
; RV32XTHEADBB-NEXT: # %bb.1: # %cond.false
260-
; RV32XTHEADBB-NEXT: bnez a0, .LBB3_4
261-
; RV32XTHEADBB-NEXT: # %bb.2: # %cond.false
262-
; RV32XTHEADBB-NEXT: addi a0, a1, -1
263-
; RV32XTHEADBB-NEXT: not a1, a1
264-
; RV32XTHEADBB-NEXT: and a0, a1, a0
265-
; RV32XTHEADBB-NEXT: th.ff1 a0, a0
266-
; RV32XTHEADBB-NEXT: li a1, 64
267-
; RV32XTHEADBB-NEXT: j .LBB3_5
268-
; RV32XTHEADBB-NEXT: .LBB3_3:
269-
; RV32XTHEADBB-NEXT: li a1, 0
270-
; RV32XTHEADBB-NEXT: li a0, 64
271-
; RV32XTHEADBB-NEXT: ret
272-
; RV32XTHEADBB-NEXT: .LBB3_4:
273-
; RV32XTHEADBB-NEXT: addi a1, a0, -1
274-
; RV32XTHEADBB-NEXT: not a0, a0
275-
; RV32XTHEADBB-NEXT: and a0, a0, a1
276-
; RV32XTHEADBB-NEXT: th.ff1 a0, a0
277-
; RV32XTHEADBB-NEXT: li a1, 32
278-
; RV32XTHEADBB-NEXT: .LBB3_5: # %cond.false
279-
; RV32XTHEADBB-NEXT: sub a0, a1, a0
280-
; RV32XTHEADBB-NEXT: li a1, 0
281-
; RV32XTHEADBB-NEXT: ret
280+
; RV32XTHEADBB-NOB-LABEL: cttz_i64:
281+
; RV32XTHEADBB-NOB: # %bb.0:
282+
; RV32XTHEADBB-NOB-NEXT: or a2, a0, a1
283+
; RV32XTHEADBB-NOB-NEXT: beqz a2, .LBB3_3
284+
; RV32XTHEADBB-NOB-NEXT: # %bb.1: # %cond.false
285+
; RV32XTHEADBB-NOB-NEXT: bnez a0, .LBB3_4
286+
; RV32XTHEADBB-NOB-NEXT: # %bb.2: # %cond.false
287+
; RV32XTHEADBB-NOB-NEXT: addi a0, a1, -1
288+
; RV32XTHEADBB-NOB-NEXT: not a1, a1
289+
; RV32XTHEADBB-NOB-NEXT: and a0, a1, a0
290+
; RV32XTHEADBB-NOB-NEXT: th.ff1 a0, a0
291+
; RV32XTHEADBB-NOB-NEXT: li a1, 64
292+
; RV32XTHEADBB-NOB-NEXT: j .LBB3_5
293+
; RV32XTHEADBB-NOB-NEXT: .LBB3_3:
294+
; RV32XTHEADBB-NOB-NEXT: li a1, 0
295+
; RV32XTHEADBB-NOB-NEXT: li a0, 64
296+
; RV32XTHEADBB-NOB-NEXT: ret
297+
; RV32XTHEADBB-NOB-NEXT: .LBB3_4:
298+
; RV32XTHEADBB-NOB-NEXT: addi a1, a0, -1
299+
; RV32XTHEADBB-NOB-NEXT: not a0, a0
300+
; RV32XTHEADBB-NOB-NEXT: and a0, a0, a1
301+
; RV32XTHEADBB-NOB-NEXT: th.ff1 a0, a0
302+
; RV32XTHEADBB-NOB-NEXT: li a1, 32
303+
; RV32XTHEADBB-NOB-NEXT: .LBB3_5: # %cond.false
304+
; RV32XTHEADBB-NOB-NEXT: sub a0, a1, a0
305+
; RV32XTHEADBB-NOB-NEXT: li a1, 0
306+
; RV32XTHEADBB-NOB-NEXT: ret
307+
;
308+
; RV32XTHEADBB-B-LABEL: cttz_i64:
309+
; RV32XTHEADBB-B: # %bb.0:
310+
; RV32XTHEADBB-B-NEXT: bnez a0, .LBB3_2
311+
; RV32XTHEADBB-B-NEXT: # %bb.1:
312+
; RV32XTHEADBB-B-NEXT: ctz a0, a1
313+
; RV32XTHEADBB-B-NEXT: addi a0, a0, 32
314+
; RV32XTHEADBB-B-NEXT: li a1, 0
315+
; RV32XTHEADBB-B-NEXT: ret
316+
; RV32XTHEADBB-B-NEXT: .LBB3_2:
317+
; RV32XTHEADBB-B-NEXT: ctz a0, a0
318+
; RV32XTHEADBB-B-NEXT: li a1, 0
319+
; RV32XTHEADBB-B-NEXT: ret
282320
%1 = call i64 @llvm.cttz.i64(i64 %a, i1 false)
283321
ret i64 %1
284322
}
@@ -341,10 +379,15 @@ define i32 @sextb_i32(i32 %a) nounwind {
341379
; RV32I-NEXT: srai a0, a0, 24
342380
; RV32I-NEXT: ret
343381
;
344-
; RV32XTHEADBB-LABEL: sextb_i32:
345-
; RV32XTHEADBB: # %bb.0:
346-
; RV32XTHEADBB-NEXT: th.ext a0, a0, 7, 0
347-
; RV32XTHEADBB-NEXT: ret
382+
; RV32XTHEADBB-NOB-LABEL: sextb_i32:
383+
; RV32XTHEADBB-NOB: # %bb.0:
384+
; RV32XTHEADBB-NOB-NEXT: th.ext a0, a0, 7, 0
385+
; RV32XTHEADBB-NOB-NEXT: ret
386+
;
387+
; RV32XTHEADBB-B-LABEL: sextb_i32:
388+
; RV32XTHEADBB-B: # %bb.0:
389+
; RV32XTHEADBB-B-NEXT: sext.b a0, a0
390+
; RV32XTHEADBB-B-NEXT: ret
348391
%shl = shl i32 %a, 24
349392
%shr = ashr exact i32 %shl, 24
350393
ret i32 %shr
@@ -358,11 +401,17 @@ define i64 @sextb_i64(i64 %a) nounwind {
358401
; RV32I-NEXT: srai a1, a1, 31
359402
; RV32I-NEXT: ret
360403
;
361-
; RV32XTHEADBB-LABEL: sextb_i64:
362-
; RV32XTHEADBB: # %bb.0:
363-
; RV32XTHEADBB-NEXT: th.ext a0, a0, 7, 0
364-
; RV32XTHEADBB-NEXT: srai a1, a0, 31
365-
; RV32XTHEADBB-NEXT: ret
404+
; RV32XTHEADBB-NOB-LABEL: sextb_i64:
405+
; RV32XTHEADBB-NOB: # %bb.0:
406+
; RV32XTHEADBB-NOB-NEXT: th.ext a0, a0, 7, 0
407+
; RV32XTHEADBB-NOB-NEXT: srai a1, a0, 31
408+
; RV32XTHEADBB-NOB-NEXT: ret
409+
;
410+
; RV32XTHEADBB-B-LABEL: sextb_i64:
411+
; RV32XTHEADBB-B: # %bb.0:
412+
; RV32XTHEADBB-B-NEXT: sext.b a0, a0
413+
; RV32XTHEADBB-B-NEXT: srai a1, a0, 31
414+
; RV32XTHEADBB-B-NEXT: ret
366415
%shl = shl i64 %a, 56
367416
%shr = ashr exact i64 %shl, 56
368417
ret i64 %shr
@@ -375,10 +424,15 @@ define i32 @sexth_i32(i32 %a) nounwind {
375424
; RV32I-NEXT: srai a0, a0, 16
376425
; RV32I-NEXT: ret
377426
;
378-
; RV32XTHEADBB-LABEL: sexth_i32:
379-
; RV32XTHEADBB: # %bb.0:
380-
; RV32XTHEADBB-NEXT: th.ext a0, a0, 15, 0
381-
; RV32XTHEADBB-NEXT: ret
427+
; RV32XTHEADBB-NOB-LABEL: sexth_i32:
428+
; RV32XTHEADBB-NOB: # %bb.0:
429+
; RV32XTHEADBB-NOB-NEXT: th.ext a0, a0, 15, 0
430+
; RV32XTHEADBB-NOB-NEXT: ret
431+
;
432+
; RV32XTHEADBB-B-LABEL: sexth_i32:
433+
; RV32XTHEADBB-B: # %bb.0:
434+
; RV32XTHEADBB-B-NEXT: sext.h a0, a0
435+
; RV32XTHEADBB-B-NEXT: ret
382436
%shl = shl i32 %a, 16
383437
%shr = ashr exact i32 %shl, 16
384438
ret i32 %shr
@@ -409,11 +463,17 @@ define i64 @sexth_i64(i64 %a) nounwind {
409463
; RV32I-NEXT: srai a1, a1, 31
410464
; RV32I-NEXT: ret
411465
;
412-
; RV32XTHEADBB-LABEL: sexth_i64:
413-
; RV32XTHEADBB: # %bb.0:
414-
; RV32XTHEADBB-NEXT: th.ext a0, a0, 15, 0
415-
; RV32XTHEADBB-NEXT: srai a1, a0, 31
416-
; RV32XTHEADBB-NEXT: ret
466+
; RV32XTHEADBB-NOB-LABEL: sexth_i64:
467+
; RV32XTHEADBB-NOB: # %bb.0:
468+
; RV32XTHEADBB-NOB-NEXT: th.ext a0, a0, 15, 0
469+
; RV32XTHEADBB-NOB-NEXT: srai a1, a0, 31
470+
; RV32XTHEADBB-NOB-NEXT: ret
471+
;
472+
; RV32XTHEADBB-B-LABEL: sexth_i64:
473+
; RV32XTHEADBB-B: # %bb.0:
474+
; RV32XTHEADBB-B-NEXT: sext.h a0, a0
475+
; RV32XTHEADBB-B-NEXT: srai a1, a0, 31
476+
; RV32XTHEADBB-B-NEXT: ret
417477
%shl = shl i64 %a, 48
418478
%shr = ashr exact i64 %shl, 48
419479
ret i64 %shr
@@ -477,10 +537,15 @@ define i32 @zexth_i32(i32 %a) nounwind {
477537
; RV32I-NEXT: srli a0, a0, 16
478538
; RV32I-NEXT: ret
479539
;
480-
; RV32XTHEADBB-LABEL: zexth_i32:
481-
; RV32XTHEADBB: # %bb.0:
482-
; RV32XTHEADBB-NEXT: th.extu a0, a0, 15, 0
483-
; RV32XTHEADBB-NEXT: ret
540+
; RV32XTHEADBB-NOB-LABEL: zexth_i32:
541+
; RV32XTHEADBB-NOB: # %bb.0:
542+
; RV32XTHEADBB-NOB-NEXT: th.extu a0, a0, 15, 0
543+
; RV32XTHEADBB-NOB-NEXT: ret
544+
;
545+
; RV32XTHEADBB-B-LABEL: zexth_i32:
546+
; RV32XTHEADBB-B: # %bb.0:
547+
; RV32XTHEADBB-B-NEXT: zext.h a0, a0
548+
; RV32XTHEADBB-B-NEXT: ret
484549
%and = and i32 %a, 65535
485550
ret i32 %and
486551
}
@@ -493,11 +558,17 @@ define i64 @zexth_i64(i64 %a) nounwind {
493558
; RV32I-NEXT: li a1, 0
494559
; RV32I-NEXT: ret
495560
;
496-
; RV32XTHEADBB-LABEL: zexth_i64:
497-
; RV32XTHEADBB: # %bb.0:
498-
; RV32XTHEADBB-NEXT: th.extu a0, a0, 15, 0
499-
; RV32XTHEADBB-NEXT: li a1, 0
500-
; RV32XTHEADBB-NEXT: ret
561+
; RV32XTHEADBB-NOB-LABEL: zexth_i64:
562+
; RV32XTHEADBB-NOB: # %bb.0:
563+
; RV32XTHEADBB-NOB-NEXT: th.extu a0, a0, 15, 0
564+
; RV32XTHEADBB-NOB-NEXT: li a1, 0
565+
; RV32XTHEADBB-NOB-NEXT: ret
566+
;
567+
; RV32XTHEADBB-B-LABEL: zexth_i64:
568+
; RV32XTHEADBB-B: # %bb.0:
569+
; RV32XTHEADBB-B-NEXT: zext.h a0, a0
570+
; RV32XTHEADBB-B-NEXT: li a1, 0
571+
; RV32XTHEADBB-B-NEXT: ret
501572
%and = and i64 %a, 65535
502573
ret i64 %and
503574
}
@@ -520,10 +591,15 @@ define i32 @bswap_i32(i32 %a) nounwind {
520591
; RV32I-NEXT: or a0, a0, a1
521592
; RV32I-NEXT: ret
522593
;
523-
; RV32XTHEADBB-LABEL: bswap_i32:
524-
; RV32XTHEADBB: # %bb.0:
525-
; RV32XTHEADBB-NEXT: th.rev a0, a0
526-
; RV32XTHEADBB-NEXT: ret
594+
; RV32XTHEADBB-NOB-LABEL: bswap_i32:
595+
; RV32XTHEADBB-NOB: # %bb.0:
596+
; RV32XTHEADBB-NOB-NEXT: th.rev a0, a0
597+
; RV32XTHEADBB-NOB-NEXT: ret
598+
;
599+
; RV32XTHEADBB-B-LABEL: bswap_i32:
600+
; RV32XTHEADBB-B: # %bb.0:
601+
; RV32XTHEADBB-B-NEXT: rev8 a0, a0
602+
; RV32XTHEADBB-B-NEXT: ret
527603
%1 = tail call i32 @llvm.bswap.i32(i32 %a)
528604
ret i32 %1
529605
}
@@ -555,12 +631,19 @@ define i64 @bswap_i64(i64 %a) {
555631
; RV32I-NEXT: or a1, a3, a4
556632
; RV32I-NEXT: ret
557633
;
558-
; RV32XTHEADBB-LABEL: bswap_i64:
559-
; RV32XTHEADBB: # %bb.0:
560-
; RV32XTHEADBB-NEXT: th.rev a2, a1
561-
; RV32XTHEADBB-NEXT: th.rev a1, a0
562-
; RV32XTHEADBB-NEXT: mv a0, a2
563-
; RV32XTHEADBB-NEXT: ret
634+
; RV32XTHEADBB-NOB-LABEL: bswap_i64:
635+
; RV32XTHEADBB-NOB: # %bb.0:
636+
; RV32XTHEADBB-NOB-NEXT: th.rev a2, a1
637+
; RV32XTHEADBB-NOB-NEXT: th.rev a1, a0
638+
; RV32XTHEADBB-NOB-NEXT: mv a0, a2
639+
; RV32XTHEADBB-NOB-NEXT: ret
640+
;
641+
; RV32XTHEADBB-B-LABEL: bswap_i64:
642+
; RV32XTHEADBB-B: # %bb.0:
643+
; RV32XTHEADBB-B-NEXT: rev8 a2, a1
644+
; RV32XTHEADBB-B-NEXT: rev8 a1, a0
645+
; RV32XTHEADBB-B-NEXT: mv a0, a2
646+
; RV32XTHEADBB-B-NEXT: ret
564647
%1 = call i64 @llvm.bswap.i64(i64 %a)
565648
ret i64 %1
566649
}

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