@@ -3411,7 +3411,6 @@ void SIInstrInfo::insertSelect(MachineBasicBlock &MBB,
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bool SIInstrInfo::isFoldableCopy (const MachineInstr &MI) {
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switch (MI.getOpcode ()) {
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case AMDGPU::V_MOV_B16_t16_e32:
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- case AMDGPU::V_MOV_B16_t16_e64:
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case AMDGPU::V_MOV_B32_e32:
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case AMDGPU::V_MOV_B32_e64:
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case AMDGPU::V_MOV_B64_PSEUDO:
@@ -3428,34 +3427,10 @@ bool SIInstrInfo::isFoldableCopy(const MachineInstr &MI) {
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case AMDGPU::AV_MOV_B32_IMM_PSEUDO:
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case AMDGPU::AV_MOV_B64_IMM_PSEUDO:
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return true ;
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- default :
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- return false ;
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- }
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- }
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-
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- unsigned SIInstrInfo::getFoldableCopySrcIdx (const MachineInstr &MI) {
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- switch (MI.getOpcode ()) {
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- case AMDGPU::V_MOV_B16_t16_e32:
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case AMDGPU::V_MOV_B16_t16_e64:
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- return 2 ;
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- case AMDGPU::V_MOV_B32_e32:
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- case AMDGPU::V_MOV_B32_e64:
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- case AMDGPU::V_MOV_B64_PSEUDO:
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- case AMDGPU::V_MOV_B64_e32:
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- case AMDGPU::V_MOV_B64_e64:
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- case AMDGPU::S_MOV_B32:
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- case AMDGPU::S_MOV_B64:
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- case AMDGPU::S_MOV_B64_IMM_PSEUDO:
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- case AMDGPU::COPY:
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- case AMDGPU::WWM_COPY:
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- case AMDGPU::V_ACCVGPR_WRITE_B32_e64:
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- case AMDGPU::V_ACCVGPR_READ_B32_e64:
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- case AMDGPU::V_ACCVGPR_MOV_B32:
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- case AMDGPU::AV_MOV_B32_IMM_PSEUDO:
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- case AMDGPU::AV_MOV_B64_IMM_PSEUDO:
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- return 1 ;
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+ return !TII->hasAnyModifiersSet (MI);
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default :
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- llvm_unreachable ( " MI is not a foldable copy " ) ;
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+ return false ;
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}
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}
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