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chencha3chencha3
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cleanup
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7 files changed

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-32
lines changed

7 files changed

+31
-32
lines changed

‎mlir/include/mlir/Dialect/XeGPU/IR/XeGPU.h‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -24,7 +24,7 @@
2424
namespace mlir {
2525
namespace xegpu {
2626
class TensorDescType;
27-
class DistributeLayoutAttrInterface;
27+
class DistributeLayoutAttr;
2828
class LayoutAttr;
2929
class SliceAttr;
3030
} // namespace xegpu

‎mlir/include/mlir/Dialect/XeGPU/IR/XeGPUAttrs.td‎

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -175,7 +175,7 @@ def XeGPU_FenceScopeAttr:
175175
let assemblyFormat = "$value";
176176
}
177177

178-
def DistributeLayoutAttrInterface: AttrInterface<"DistributeLayoutAttrInterface"> {
178+
def DistributeLayoutAttr: AttrInterface<"DistributeLayoutAttr"> {
179179
let cppNamespace = "::mlir::xegpu";
180180
let description = [{
181181
Common trait for all XeGPU layouts.
@@ -203,7 +203,7 @@ def DistributeLayoutAttrInterface: AttrInterface<"DistributeLayoutAttrInterface"
203203
"std::optional<SmallVector<int64_t>>",
204204
"getSgDataAsInt">,
205205
InterfaceMethod<"Derive a new layout by dropping sgLayout and sgData",
206-
"xegpu::DistributeLayoutAttrInterface",
206+
"xegpu::DistributeLayoutAttr",
207207
"dropSgLayoutAndData">,
208208
InterfaceMethod<[{Delinearizes a linear subgroup ID into its multidimensional
209209
indices based on the effective subgroup layout.}],
@@ -220,7 +220,7 @@ def DistributeLayoutAttrInterface: AttrInterface<"DistributeLayoutAttrInterface"
220220
];
221221
}
222222

223-
def XeGPU_LayoutAttr : XeGPUAttr<"Layout", "layout", [DistributeLayoutAttrInterface]> {
223+
def XeGPU_LayoutAttr : XeGPUAttr<"Layout", "layout", [DistributeLayoutAttr]> {
224224
let summary = [{
225225
Describes the data distribution to subgroups and work-items for a tensor
226226
specified by the tensor descriptor.
@@ -407,7 +407,7 @@ def XeGPU_LayoutAttr : XeGPUAttr<"Layout", "layout", [DistributeLayoutAttrInterf
407407
}
408408

409409

410-
def XeGPU_SliceAttr : XeGPUAttr<"Slice", "slice", [DistributeLayoutAttrInterface]> {
410+
def XeGPU_SliceAttr : XeGPUAttr<"Slice", "slice", [DistributeLayoutAttr]> {
411411
let summary = [{Describes the data distribution and sharing among subgroups or work-items.}];
412412

413413
let description = [{
@@ -434,7 +434,7 @@ def XeGPU_SliceAttr : XeGPUAttr<"Slice", "slice", [DistributeLayoutAttrInterface
434434
}];
435435

436436
let parameters = (ins
437-
"xegpu::DistributeLayoutAttrInterface": $parent,
437+
"xegpu::DistributeLayoutAttr": $parent,
438438
"DenseI64ArrayAttr": $dims
439439
);
440440

‎mlir/include/mlir/Dialect/XeGPU/IR/XeGPUOps.td‎

Lines changed: 12 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -232,8 +232,8 @@ def XeGPU_CreateNdDescOp: XeGPU_Op<"create_nd_tdesc", [Pure, ViewLikeOpInterface
232232
return static_cast<unsigned>(MemorySpace::Global);
233233
}
234234

235-
xegpu::DistributeLayoutAttrInterface getLayoutAttr() {
236-
return dyn_cast_if_present<xegpu::DistributeLayoutAttrInterface>(getType().getLayout());
235+
xegpu::DistributeLayoutAttr getLayoutAttr() {
236+
return dyn_cast_if_present<xegpu::DistributeLayoutAttr>(getType().getLayout());
237237
}
238238

239239
ArrayRef<int64_t> getDistributeShape() {
@@ -279,8 +279,8 @@ def XeGPU_PrefetchNdOp : XeGPU_Op<"prefetch_nd", []> {
279279
return getMixedValues(statics, dynamics, getContext());
280280
}
281281

282-
xegpu::DistributeLayoutAttrInterface getLayoutAttr() {
283-
return dyn_cast_if_present<xegpu::DistributeLayoutAttrInterface>(getTensorDescType().getLayout());
282+
xegpu::DistributeLayoutAttr getLayoutAttr() {
283+
return dyn_cast_if_present<xegpu::DistributeLayoutAttr>(getTensorDescType().getLayout());
284284
}
285285

286286
ArrayRef<int64_t> getDistributeShape() {
@@ -377,8 +377,8 @@ def XeGPU_LoadNdOp : XeGPU_Op<"load_nd", [
377377
return getMixedValues(statics, dynamics, getContext());
378378
}
379379

380-
xegpu::DistributeLayoutAttrInterface getLayoutAttr() {
381-
return dyn_cast_if_present<xegpu::DistributeLayoutAttrInterface>(getTensorDescType().getLayout());
380+
xegpu::DistributeLayoutAttr getLayoutAttr() {
381+
return dyn_cast_if_present<xegpu::DistributeLayoutAttr>(getTensorDescType().getLayout());
382382
}
383383

384384
ArrayRef<int64_t> getDistributeShape() {
@@ -469,8 +469,8 @@ def XeGPU_StoreNdOp : XeGPU_Op<"store_nd", [
469469
return getMixedValues(statics, dynamics, getContext());
470470
}
471471

472-
xegpu::DistributeLayoutAttrInterface getLayoutAttr() {
473-
return dyn_cast_if_present<xegpu::DistributeLayoutAttrInterface>(getTensorDescType().getLayout());
472+
xegpu::DistributeLayoutAttr getLayoutAttr() {
473+
return dyn_cast_if_present<xegpu::DistributeLayoutAttr>(getTensorDescType().getLayout());
474474
}
475475

476476
ArrayRef<int64_t> getDistributeShape() {
@@ -1211,7 +1211,7 @@ def XeGPU_LoadMatrixOp: XeGPU_Op<"load_matrix", [MemoryEffects<[MemRead]>,
12111211
let arguments = (ins XeGPU_MemDesc:$mem_desc,
12121212
Variadic<Index>: $offsets,
12131213
DenseI64ArrayAttr: $const_offsets,
1214-
OptionalAttr<DistributeLayoutAttrInterface>:$layout
1214+
OptionalAttr<DistributeLayoutAttr>:$layout
12151215
);
12161216
let results = (outs XeGPU_ValueType:$res);
12171217
let assemblyFormat = [{
@@ -1236,7 +1236,7 @@ def XeGPU_LoadMatrixOp: XeGPU_Op<"load_matrix", [MemoryEffects<[MemRead]>,
12361236

12371237
let builders = [
12381238
OpBuilder<(ins "Type":$res, "TypedValue<MemDescType>": $mem_desc,
1239-
"llvm::ArrayRef<OpFoldResult>": $offsets, "DistributeLayoutAttrInterface": $layout)>,
1239+
"llvm::ArrayRef<OpFoldResult>": $offsets, "DistributeLayoutAttr": $layout)>,
12401240
];
12411241
let extraClassDeclaration = [{
12421242
SmallVector<OpFoldResult> getMixedOffsets() {
@@ -1259,7 +1259,7 @@ def XeGPU_StoreMatrixOp: XeGPU_Op<"store_matrix", [MemoryEffects<[MemWrite]>,
12591259
XeGPU_MemDesc:$mem_desc,
12601260
Variadic<Index>: $offsets,
12611261
DenseI64ArrayAttr: $const_offsets,
1262-
OptionalAttr<DistributeLayoutAttrInterface>:$layout
1262+
OptionalAttr<DistributeLayoutAttr>:$layout
12631263
);
12641264
let assemblyFormat = [{ $data `,` $mem_desc `` custom<DynamicIndexList>($offsets, $const_offsets)
12651265
prop-dict attr-dict `` `:` type(operands)}];
@@ -1278,7 +1278,7 @@ def XeGPU_StoreMatrixOp: XeGPU_Op<"store_matrix", [MemoryEffects<[MemWrite]>,
12781278
}];
12791279
let builders = [
12801280
OpBuilder<(ins "Value" : $data, "TypedValue<MemDescType>": $mem_desc,
1281-
"llvm::ArrayRef<OpFoldResult>": $offsets, "DistributeLayoutAttrInterface": $layout)>,
1281+
"llvm::ArrayRef<OpFoldResult>": $offsets, "DistributeLayoutAttr": $layout)>,
12821282
];
12831283
let extraClassDeclaration = [{
12841284
SmallVector<OpFoldResult> getMixedOffsets() {

‎mlir/lib/Dialect/XeGPU/IR/XeGPUDialect.cpp‎

Lines changed: 4 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -290,7 +290,7 @@ LayoutAttr::delinearizeSubgroupId(OpBuilder &builder, Location loc,
290290
return affine::delinearizeIndex(builder, loc, linearId, dims);
291291
}
292292

293-
/// Implements DistributeLayoutAttrInterface::getOffsets to generate
293+
/// Implements DistributeLayoutAttr::getOffsets to generate
294294
/// instructions for computing multi-dimensional offsets when distributed by
295295
/// LayoutAttr.
296296
FailureOr<SmallVector<SmallVector<Value>>>
@@ -323,8 +323,7 @@ LayoutAttr::getOffsets(OpBuilder &builder, Location loc, Value linearId,
323323
//===----------------------------------------------------------------------===//
324324
LogicalResult
325325
SliceAttr::verify(llvm::function_ref<InFlightDiagnostic()> emitError,
326-
xegpu::DistributeLayoutAttrInterface parent,
327-
DenseI64ArrayAttr dims) {
326+
xegpu::DistributeLayoutAttr parent, DenseI64ArrayAttr dims) {
328327
if (!parent || !dims)
329328
return emitError() << "expected parent layout and dims attribute";
330329

@@ -342,7 +341,7 @@ SliceAttr::verify(llvm::function_ref<InFlightDiagnostic()> emitError,
342341
}
343342

344343
SliceAttr SliceAttr::flatten() const {
345-
xegpu::DistributeLayoutAttrInterface parent = getParent();
344+
xegpu::DistributeLayoutAttr parent = getParent();
346345
SmallVector<DenseI64ArrayAttr> slicedDims({getDims()});
347346

348347
while (auto sliceAttr = dyn_cast<xegpu::SliceAttr>(parent)) {
@@ -377,7 +376,7 @@ SliceAttr::delinearizeSubgroupId(OpBuilder &builder, Location loc,
377376
return parent.delinearizeSubgroupId(builder, loc, linearId);
378377
}
379378

380-
/// Implements DistributeLayoutAttrInterface::getOffsets to generate
379+
/// Implements DistributeLayoutAttr::getOffsets to generate
381380
/// instructions for computing multi-dimensional offsets when distributed by
382381
/// SliceAttr.
383382
FailureOr<SmallVector<SmallVector<Value>>>

‎mlir/lib/Dialect/XeGPU/IR/XeGPUOps.cpp‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -984,7 +984,7 @@ void ConvertLayoutOp::getCanonicalizationPatterns(RewritePatternSet &patterns,
984984
void LoadMatrixOp::build(OpBuilder &builder, OperationState &state, Type res,
985985
TypedValue<MemDescType> memDesc,
986986
llvm::ArrayRef<OpFoldResult> offsets,
987-
DistributeLayoutAttrInterface layout) {
987+
DistributeLayoutAttr layout) {
988988
llvm::SmallVector<Value> dynamicOffsets;
989989
llvm::SmallVector<int64_t> staticOffsets;
990990
dispatchIndexOpFoldResults(offsets, dynamicOffsets, staticOffsets);
@@ -1014,7 +1014,7 @@ LogicalResult LoadMatrixOp::verify() {
10141014
void StoreMatrixOp::build(OpBuilder &builder, OperationState &state, Value data,
10151015
TypedValue<MemDescType> memDesc,
10161016
llvm::ArrayRef<OpFoldResult> offsets,
1017-
DistributeLayoutAttrInterface layout) {
1017+
DistributeLayoutAttr layout) {
10181018
llvm::SmallVector<Value> dynamicOffsets;
10191019
llvm::SmallVector<int64_t> staticOffsets;
10201020
dispatchIndexOpFoldResults(offsets, dynamicOffsets, staticOffsets);

‎mlir/lib/Dialect/XeGPU/Transforms/XeGPUWgToSgDistribute.cpp‎

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -56,7 +56,7 @@ static bool isSgIdRangeSpecified(Operation *op, int64_t &startOfRange,
5656

5757
static std::pair<SmallVector<int64_t>, int>
5858
getSgShapeAndCount(ArrayRef<int64_t> shape,
59-
xegpu::DistributeLayoutAttrInterface layout) {
59+
xegpu::DistributeLayoutAttr layout) {
6060
int count = 1;
6161
SmallVector<int64_t> sgShape(shape);
6262
if (layout && layout.isForWorkgroup()) {
@@ -120,7 +120,7 @@ genOffsetsList(ConversionPatternRewriter &rewriter, OpType op,
120120
return failure();
121121

122122
// not applicable to ops without workgroup layout attributes
123-
xegpu::DistributeLayoutAttrInterface layout = op.getLayoutAttr();
123+
xegpu::DistributeLayoutAttr layout = op.getLayoutAttr();
124124
if (!layout || !layout.isForWorkgroup())
125125
return failure();
126126

@@ -217,7 +217,7 @@ struct WgToSgCreateNdOp : public OpConversionPattern<xegpu::CreateNdDescOp> {
217217
xegpu::TensorDescType tdescTy = op.getType();
218218
ArrayRef<int64_t> wgShape = tdescTy.getShape();
219219
Type elemTy = tdescTy.getElementType();
220-
xegpu::DistributeLayoutAttrInterface layout = op.getLayoutAttr();
220+
xegpu::DistributeLayoutAttr layout = op.getLayoutAttr();
221221
SmallVector<int64_t> sgShape = getSgShapeAndCount(wgShape, layout).first;
222222
auto newTdescTy =
223223
xegpu::TensorDescType::get(ctx, sgShape, elemTy, tdescTy.getEncoding(),
@@ -806,7 +806,7 @@ struct WgToSgLoadMatrixOp : public OpConversionPattern<xegpu::LoadMatrixOp> {
806806
VectorType valueTy = op.getRes().getType();
807807
Type elemTy = valueTy.getElementType();
808808

809-
xegpu::DistributeLayoutAttrInterface layout = op.getLayoutAttr();
809+
xegpu::DistributeLayoutAttr layout = op.getLayoutAttr();
810810
SmallVector<int64_t> sgShape = getSgShapeAndCount(wgShape, layout).first;
811811
VectorType newResTy = VectorType::get(sgShape, elemTy);
812812
SmallVector<Value> newOps;
@@ -832,7 +832,7 @@ struct WgToSgStoreMatrixOp : public OpConversionPattern<xegpu::StoreMatrixOp> {
832832
if (failed(genOffsetsList(rewriter, op, offsetsList)))
833833
return failure();
834834

835-
xegpu::DistributeLayoutAttrInterface layout = op.getLayoutAttr();
835+
xegpu::DistributeLayoutAttr layout = op.getLayoutAttr();
836836
for (auto [v, offsets] : llvm::zip(adaptor.getData(), offsetsList))
837837
rewriter.create<xegpu::StoreMatrixOp>(op.getLoc(), v, op.getMemDesc(),
838838
offsets,
@@ -944,7 +944,7 @@ void XeGPUWgToSgDistributePass::runOnOperation() {
944944
return xegpu::TensorDescType();
945945
};
946946

947-
auto isLegal = [&](xegpu::DistributeLayoutAttrInterface layout) -> bool {
947+
auto isLegal = [&](xegpu::DistributeLayoutAttr layout) -> bool {
948948
return !layout || !layout.isForWorkgroup();
949949
};
950950

‎mlir/test/lib/Dialect/XeGPU/TestXeGPUTransforms.cpp‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -156,7 +156,7 @@ struct TestXeGPUUnrollingPatterns
156156
#define LDBG(X) LLVM_DEBUG(DBGS() << X << "\n")
157157

158158
// Test pattern for distributing vector::StepOp from workgroup to subgroup.
159-
// Validates DistributeLayoutAttrInterface interfaces for offset computation
159+
// Validates DistributeLayoutAttr interfaces for offset computation
160160
// abstraction between LayoutAttr and SliceAttr.
161161
class TestStepOpPattern : public OpConversionPattern<vector::StepOp> {
162162
using OpConversionPattern<vector::StepOp>::OpConversionPattern;

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