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[AArch64][GlobalISel] Add regbank information to other sha1 intrinsics.
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llvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.cpp

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@@ -483,6 +483,9 @@ static bool isFPIntrinsic(const MachineRegisterInfo &MRI,
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case Intrinsic::aarch64_neon_sqadd:
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case Intrinsic::aarch64_neon_sqsub:
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case Intrinsic::aarch64_crypto_sha1h:
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case Intrinsic::aarch64_crypto_sha1c:
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case Intrinsic::aarch64_crypto_sha1p:
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case Intrinsic::aarch64_crypto_sha1m:
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return true;
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case Intrinsic::aarch64_neon_saddlv: {
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const LLT SrcTy = MRI.getType(MI.getOperand(2).getReg());

llvm/test/CodeGen/AArch64/arm64-crypto.ll

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@@ -1,11 +1,7 @@
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
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; RUN: llc -mtriple=arm64-eabi -mattr=crypto -aarch64-neon-syntax=apple -o - %s | FileCheck %s --check-prefixes=CHECK,CHECK-SD
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; RUN: llc -mtriple=arm64-eabi -mattr=crypto -aarch64-neon-syntax=apple -global-isel -global-isel-abort=2 -o - %s 2>&1 | FileCheck %s --check-prefixes=CHECK,CHECK-GI
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; RUN: llc -mtriple=arm64-eabi -mattr=crypto -aarch64-neon-syntax=apple -global-isel -o - %s | FileCheck %s --check-prefixes=CHECK,CHECK-GI
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; CHECK-GI: warning: Instruction selection used fallback path for test_sha1c
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; CHECK-GI-NEXT: warning: Instruction selection used fallback path for test_sha1c_in_a_row
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; CHECK-GI-NEXT: warning: Instruction selection used fallback path for test_sha1p
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; CHECK-GI-NEXT: warning: Instruction selection used fallback path for test_sha1m
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declare <16 x i8> @llvm.aarch64.crypto.aese(<16 x i8> %data, <16 x i8> %key)
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declare <16 x i8> @llvm.aarch64.crypto.aesd(<16 x i8> %data, <16 x i8> %key)

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