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[OpenACC][CIR] Update tests after #140122
Patch #140122 changed the format of OpenACC 'async', without changing the clang tests. This patch updates the test.
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5 files changed

+35
-35
lines changed

5 files changed

+35
-35
lines changed

‎clang/test/CIR/CodeGenOpenACC/data.c

Lines changed: 8 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -37,9 +37,9 @@ void acc_data(int cond) {
3737

3838
#pragma acc data default(none) async
3939
{}
40-
// CHECK-NEXT: acc.data {
40+
// CHECK-NEXT: acc.data async {
4141
// CHECK-NEXT: acc.terminator
42-
// CHECK-NEXT: } attributes {asyncOnly = [#acc.device_type<none>], defaultAttr = #acc<defaultvalue none>}
42+
// CHECK-NEXT: } attributes {defaultAttr = #acc<defaultvalue none>}
4343

4444
#pragma acc data default(none) async(cond)
4545
{}
@@ -51,9 +51,9 @@ void acc_data(int cond) {
5151

5252
#pragma acc data default(none) async device_type(nvidia, radeon) async
5353
{}
54-
// CHECK-NEXT: acc.data {
54+
// CHECK-NEXT: acc.data async([#acc.device_type<none>, #acc.device_type<nvidia>, #acc.device_type<radeon>]) {
5555
// CHECK-NEXT: acc.terminator
56-
// CHECK-NEXT: } attributes {asyncOnly = [#acc.device_type<none>, #acc.device_type<nvidia>, #acc.device_type<radeon>], defaultAttr = #acc<defaultvalue none>}
56+
// CHECK-NEXT: } attributes {defaultAttr = #acc<defaultvalue none>}
5757

5858
#pragma acc data default(none) async(3) device_type(nvidia, radeon) async(cond)
5959
{}
@@ -69,17 +69,17 @@ void acc_data(int cond) {
6969
{}
7070
// CHECK-NEXT: %[[COND_LOAD:.*]] = cir.load %[[COND]] : !cir.ptr<!s32i>, !s32i
7171
// CHECK-NEXT: %[[CONV_CAST:.*]] = builtin.unrealized_conversion_cast %[[COND_LOAD]] : !s32i to si32
72-
// CHECK-NEXT: acc.data async(%[[CONV_CAST]] : si32 [#acc.device_type<nvidia>], %[[CONV_CAST]] : si32 [#acc.device_type<radeon>]) {
72+
// CHECK-NEXT: acc.data async([#acc.device_type<none>], %[[CONV_CAST]] : si32 [#acc.device_type<nvidia>], %[[CONV_CAST]] : si32 [#acc.device_type<radeon>]) {
7373
// CHECK-NEXT: acc.terminator
74-
// CHECK-NEXT: } attributes {asyncOnly = [#acc.device_type<none>], defaultAttr = #acc<defaultvalue none>}
74+
// CHECK-NEXT: } attributes {defaultAttr = #acc<defaultvalue none>}
7575

7676
#pragma acc data default(none) async(3) device_type(nvidia, radeon) async
7777
{}
7878
// CHECK-NEXT: %[[THREE_LITERAL:.*]] = cir.const #cir.int<3> : !s32i
7979
// CHECK-NEXT: %[[THREE_CAST:.*]] = builtin.unrealized_conversion_cast %[[THREE_LITERAL]] : !s32i to si32
80-
// CHECK-NEXT: acc.data async(%[[THREE_CAST]] : si32) {
80+
// CHECK-NEXT: acc.data async([#acc.device_type<nvidia>, #acc.device_type<radeon>], %[[THREE_CAST]] : si32) {
8181
// CHECK-NEXT: acc.terminator
82-
// CHECK-NEXT: } attributes {asyncOnly = [#acc.device_type<nvidia>, #acc.device_type<radeon>], defaultAttr = #acc<defaultvalue none>}
82+
// CHECK-NEXT: } attributes {defaultAttr = #acc<defaultvalue none>}
8383

8484
#pragma acc data default(none) if(cond)
8585
{}

‎clang/test/CIR/CodeGenOpenACC/kernels.c

Lines changed: 8 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -212,9 +212,9 @@ void acc_kernels(int cond) {
212212

213213
#pragma acc kernels async
214214
{}
215-
// CHECK-NEXT: acc.kernels {
215+
// CHECK-NEXT: acc.kernels async {
216216
// CHECK-NEXT: acc.terminator
217-
// CHECK-NEXT: } attributes {asyncOnly = [#acc.device_type<none>]}
217+
// CHECK-NEXT: } loc
218218

219219
#pragma acc kernels async(cond)
220220
{}
@@ -226,9 +226,9 @@ void acc_kernels(int cond) {
226226

227227
#pragma acc kernels async device_type(nvidia, radeon) async
228228
{}
229-
// CHECK-NEXT: acc.kernels {
229+
// CHECK-NEXT: acc.kernels async([#acc.device_type<none>, #acc.device_type<nvidia>, #acc.device_type<radeon>]) {
230230
// CHECK-NEXT: acc.terminator
231-
// CHECK-NEXT: } attributes {asyncOnly = [#acc.device_type<none>, #acc.device_type<nvidia>, #acc.device_type<radeon>]}
231+
// CHECK-NEXT: } loc
232232

233233
#pragma acc kernels async(3) device_type(nvidia, radeon) async(cond)
234234
{}
@@ -244,17 +244,17 @@ void acc_kernels(int cond) {
244244
{}
245245
// CHECK-NEXT: %[[COND_LOAD:.*]] = cir.load %[[COND]] : !cir.ptr<!s32i>, !s32i
246246
// CHECK-NEXT: %[[CONV_CAST:.*]] = builtin.unrealized_conversion_cast %[[COND_LOAD]] : !s32i to si32
247-
// CHECK-NEXT: acc.kernels async(%[[CONV_CAST]] : si32 [#acc.device_type<nvidia>], %[[CONV_CAST]] : si32 [#acc.device_type<radeon>]) {
247+
// CHECK-NEXT: acc.kernels async([#acc.device_type<none>], %[[CONV_CAST]] : si32 [#acc.device_type<nvidia>], %[[CONV_CAST]] : si32 [#acc.device_type<radeon>]) {
248248
// CHECK-NEXT: acc.terminator
249-
// CHECK-NEXT: } attributes {asyncOnly = [#acc.device_type<none>]}
249+
// CHECK-NEXT: } loc
250250

251251
#pragma acc kernels async(3) device_type(nvidia, radeon) async
252252
{}
253253
// CHECK-NEXT: %[[THREE_LITERAL:.*]] = cir.const #cir.int<3> : !s32i
254254
// CHECK-NEXT: %[[THREE_CAST:.*]] = builtin.unrealized_conversion_cast %[[THREE_LITERAL]] : !s32i to si32
255-
// CHECK-NEXT: acc.kernels async(%[[THREE_CAST]] : si32) {
255+
// CHECK-NEXT: acc.kernels async([#acc.device_type<nvidia>, #acc.device_type<radeon>], %[[THREE_CAST]] : si32) {
256256
// CHECK-NEXT: acc.terminator
257-
// CHECK-NEXT: } attributes {asyncOnly = [#acc.device_type<nvidia>, #acc.device_type<radeon>]}
257+
// CHECK-NEXT: } loc
258258

259259
#pragma acc kernels num_gangs(1)
260260
{}

‎clang/test/CIR/CodeGenOpenACC/parallel.c

Lines changed: 8 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -211,9 +211,9 @@ void acc_parallel(int cond) {
211211

212212
#pragma acc parallel async
213213
{}
214-
// CHECK-NEXT: acc.parallel {
214+
// CHECK-NEXT: acc.parallel async {
215215
// CHECK-NEXT: acc.yield
216-
// CHECK-NEXT: } attributes {asyncOnly = [#acc.device_type<none>]}
216+
// CHECK-NEXT: } loc
217217

218218
#pragma acc parallel async(cond)
219219
{}
@@ -225,9 +225,9 @@ void acc_parallel(int cond) {
225225

226226
#pragma acc parallel async device_type(nvidia, radeon) async
227227
{}
228-
// CHECK-NEXT: acc.parallel {
228+
// CHECK-NEXT: acc.parallel async([#acc.device_type<none>, #acc.device_type<nvidia>, #acc.device_type<radeon>]) {
229229
// CHECK-NEXT: acc.yield
230-
// CHECK-NEXT: } attributes {asyncOnly = [#acc.device_type<none>, #acc.device_type<nvidia>, #acc.device_type<radeon>]}
230+
// CHECK-NEXT: } loc
231231

232232
#pragma acc parallel async(3) device_type(nvidia, radeon) async(cond)
233233
{}
@@ -243,17 +243,17 @@ void acc_parallel(int cond) {
243243
{}
244244
// CHECK-NEXT: %[[COND_LOAD:.*]] = cir.load %[[COND]] : !cir.ptr<!s32i>, !s32i
245245
// CHECK-NEXT: %[[CONV_CAST:.*]] = builtin.unrealized_conversion_cast %[[COND_LOAD]] : !s32i to si32
246-
// CHECK-NEXT: acc.parallel async(%[[CONV_CAST]] : si32 [#acc.device_type<nvidia>], %[[CONV_CAST]] : si32 [#acc.device_type<radeon>]) {
246+
// CHECK-NEXT: acc.parallel async([#acc.device_type<none>], %[[CONV_CAST]] : si32 [#acc.device_type<nvidia>], %[[CONV_CAST]] : si32 [#acc.device_type<radeon>]) {
247247
// CHECK-NEXT: acc.yield
248-
// CHECK-NEXT: } attributes {asyncOnly = [#acc.device_type<none>]}
248+
// CHECK-NEXT: } loc
249249

250250
#pragma acc parallel async(3) device_type(nvidia, radeon) async
251251
{}
252252
// CHECK-NEXT: %[[THREE_LITERAL:.*]] = cir.const #cir.int<3> : !s32i
253253
// CHECK-NEXT: %[[THREE_CAST:.*]] = builtin.unrealized_conversion_cast %[[THREE_LITERAL]] : !s32i to si32
254-
// CHECK-NEXT: acc.parallel async(%[[THREE_CAST]] : si32) {
254+
// CHECK-NEXT: acc.parallel async([#acc.device_type<nvidia>, #acc.device_type<radeon>], %[[THREE_CAST]] : si32) {
255255
// CHECK-NEXT: acc.yield
256-
// CHECK-NEXT: } attributes {asyncOnly = [#acc.device_type<nvidia>, #acc.device_type<radeon>]}
256+
// CHECK-NEXT: } loc
257257

258258
#pragma acc parallel num_gangs(1)
259259
{}

‎clang/test/CIR/CodeGenOpenACC/serial.c

Lines changed: 8 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -108,9 +108,9 @@ void acc_serial(int cond) {
108108

109109
#pragma acc serial async
110110
{}
111-
// CHECK-NEXT: acc.serial {
111+
// CHECK-NEXT: acc.serial async {
112112
// CHECK-NEXT: acc.yield
113-
// CHECK-NEXT: } attributes {asyncOnly = [#acc.device_type<none>]}
113+
// CHECK-NEXT: } loc
114114

115115
#pragma acc serial async(cond)
116116
{}
@@ -122,9 +122,9 @@ void acc_serial(int cond) {
122122

123123
#pragma acc serial async device_type(nvidia, radeon) async
124124
{}
125-
// CHECK-NEXT: acc.serial {
125+
// CHECK-NEXT: acc.serial async([#acc.device_type<none>, #acc.device_type<nvidia>, #acc.device_type<radeon>]) {
126126
// CHECK-NEXT: acc.yield
127-
// CHECK-NEXT: } attributes {asyncOnly = [#acc.device_type<none>, #acc.device_type<nvidia>, #acc.device_type<radeon>]}
127+
// CHECK-NEXT: } loc
128128

129129
#pragma acc serial async(3) device_type(nvidia, radeon) async(cond)
130130
{}
@@ -140,17 +140,17 @@ void acc_serial(int cond) {
140140
{}
141141
// CHECK-NEXT: %[[COND_LOAD:.*]] = cir.load %[[COND]] : !cir.ptr<!s32i>, !s32i
142142
// CHECK-NEXT: %[[CONV_CAST:.*]] = builtin.unrealized_conversion_cast %[[COND_LOAD]] : !s32i to si32
143-
// CHECK-NEXT: acc.serial async(%[[CONV_CAST]] : si32 [#acc.device_type<nvidia>], %[[CONV_CAST]] : si32 [#acc.device_type<radeon>]) {
143+
// CHECK-NEXT: acc.serial async([#acc.device_type<none>], %[[CONV_CAST]] : si32 [#acc.device_type<nvidia>], %[[CONV_CAST]] : si32 [#acc.device_type<radeon>]) {
144144
// CHECK-NEXT: acc.yield
145-
// CHECK-NEXT: } attributes {asyncOnly = [#acc.device_type<none>]}
145+
// CHECK-NEXT: } loc
146146

147147
#pragma acc serial async(3) device_type(nvidia, radeon) async
148148
{}
149149
// CHECK-NEXT: %[[THREE_LITERAL:.*]] = cir.const #cir.int<3> : !s32i
150150
// CHECK-NEXT: %[[THREE_CAST:.*]] = builtin.unrealized_conversion_cast %[[THREE_LITERAL]] : !s32i to si32
151-
// CHECK-NEXT: acc.serial async(%[[THREE_CAST]] : si32) {
151+
// CHECK-NEXT: acc.serial async([#acc.device_type<nvidia>, #acc.device_type<radeon>], %[[THREE_CAST]] : si32) {
152152
// CHECK-NEXT: acc.yield
153-
// CHECK-NEXT: } attributes {asyncOnly = [#acc.device_type<nvidia>, #acc.device_type<radeon>]}
153+
// CHECK-NEXT: } loc
154154

155155
#pragma acc serial wait
156156
{}

‎clang/test/CIR/CodeGenOpenACC/wait.c

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -15,7 +15,7 @@ void acc_wait(int cond) {
1515
// CHECK-NEXT: acc.wait if(%[[CONV_CAST]])
1616

1717
#pragma acc wait async
18-
// CHECK-NEXT: acc.wait attributes {async}
18+
// CHECK-NEXT: acc.wait async loc
1919

2020
#pragma acc wait async(cond)
2121
// CHECK-NEXT: %[[COND_LOAD:.*]] = cir.load %[[COND]] : !cir.ptr<!s32i>, !s32i
@@ -32,7 +32,7 @@ void acc_wait(int cond) {
3232
// CHECK-NEXT: %[[ONE_CAST:.*]] = builtin.unrealized_conversion_cast %[[ONE_LITERAL]] : !s32i to si32
3333
// CHECK-NEXT: %[[TWO_LITERAL:.*]] = cir.const #cir.int<2> : !s32i
3434
// CHECK-NEXT: %[[TWO_CAST:.*]] = builtin.unrealized_conversion_cast %[[TWO_LITERAL]] : !s32i to si32
35-
// CHECK-NEXT: acc.wait(%[[ONE_CAST]], %[[TWO_CAST]] : si32, si32) attributes {async}
35+
// CHECK-NEXT: acc.wait(%[[ONE_CAST]], %[[TWO_CAST]] : si32, si32) async loc
3636

3737

3838
#pragma acc wait(queues:1) if (cond)
@@ -71,7 +71,7 @@ void acc_wait(int cond) {
7171
// CHECK-NEXT: %[[TWO_CAST:.*]] = builtin.unrealized_conversion_cast %[[TWO_LITERAL]] : !s32i to si32
7272
// CHECK-NEXT: %[[THREE_LITERAL:.*]] = cir.const #cir.int<3> : !s32i
7373
// CHECK-NEXT: %[[THREE_CAST:.*]] = builtin.unrealized_conversion_cast %[[THREE_LITERAL]] : !s32i to si32
74-
// CHECK-NEXT: acc.wait(%[[TWO_CAST]], %[[THREE_CAST]] : si32, si32) wait_devnum(%[[ONE_CAST]] : si32) attributes {async}
74+
// CHECK-NEXT: acc.wait(%[[TWO_CAST]], %[[THREE_CAST]] : si32, si32) async wait_devnum(%[[ONE_CAST]] : si32) loc
7575

7676
// CHECK-NEXT: cir.return
7777
}

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