@@ -3798,6 +3798,36 @@ static void updateLiveVariables(LiveVariables *LV, MachineInstr &MI,
37983798 }
37993799}
38003800
3801+ static unsigned getNewFMAInst (const GCNSubtarget &ST, unsigned Opc) {
3802+ switch (Opc) {
3803+ case AMDGPU::V_MAC_F16_e32:
3804+ case AMDGPU::V_MAC_F16_e64:
3805+ return AMDGPU::V_MAD_F16_e64;
3806+ case AMDGPU::V_MAC_F32_e32:
3807+ case AMDGPU::V_MAC_F32_e64:
3808+ return AMDGPU::V_MAD_F32_e64;
3809+ case AMDGPU::V_MAC_LEGACY_F32_e32:
3810+ case AMDGPU::V_MAC_LEGACY_F32_e64:
3811+ return AMDGPU::V_MAD_LEGACY_F32_e64;
3812+ case AMDGPU::V_FMAC_LEGACY_F32_e32:
3813+ case AMDGPU::V_FMAC_LEGACY_F32_e64:
3814+ return AMDGPU::V_FMA_LEGACY_F32_e64;
3815+ case AMDGPU::V_FMAC_F16_e32:
3816+ case AMDGPU::V_FMAC_F16_e64:
3817+ case AMDGPU::V_FMAC_F16_fake16_e64:
3818+ return ST.hasTrue16BitInsts () ? AMDGPU::V_FMA_F16_gfx9_fake16_e64
3819+ : AMDGPU::V_FMA_F16_gfx9_e64;
3820+ case AMDGPU::V_FMAC_F32_e32:
3821+ case AMDGPU::V_FMAC_F32_e64:
3822+ return AMDGPU::V_FMA_F32_e64;
3823+ case AMDGPU::V_FMAC_F64_e32:
3824+ case AMDGPU::V_FMAC_F64_e64:
3825+ return AMDGPU::V_FMA_F64_e64;
3826+ default :
3827+ llvm_unreachable (" invalid instruction" );
3828+ }
3829+ }
3830+
38013831MachineInstr *SIInstrInfo::convertToThreeAddress (MachineInstr &MI,
38023832 LiveVariables *LV,
38033833 LiveIntervals *LIS) const {
@@ -4033,15 +4063,8 @@ MachineInstr *SIInstrInfo::convertToThreeAddress(MachineInstr &MI,
40334063 if (Src0Literal && !ST.hasVOP3Literal ())
40344064 return nullptr ;
40354065
4036- unsigned NewOpc = IsFMA ? IsF16 ? ST.hasTrue16BitInsts ()
4037- ? AMDGPU::V_FMA_F16_gfx9_fake16_e64
4038- : AMDGPU::V_FMA_F16_gfx9_e64
4039- : IsF64 ? AMDGPU::V_FMA_F64_e64
4040- : IsLegacy ? AMDGPU::V_FMA_LEGACY_F32_e64
4041- : AMDGPU::V_FMA_F32_e64
4042- : IsF16 ? AMDGPU::V_MAD_F16_e64
4043- : IsLegacy ? AMDGPU::V_MAD_LEGACY_F32_e64
4044- : AMDGPU::V_MAD_F32_e64;
4066+ unsigned NewOpc = getNewFMAInst (ST, Opc);
4067+
40454068 if (pseudoToMCOpcode (NewOpc) == -1 )
40464069 return nullptr ;
40474070
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