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1 | 1 | ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6 |
2 | 2 | ; Zicond with zfinx(implies by zdinx) |
3 | 3 | ; RUN: llc -mtriple=riscv64 -mattr=+zdinx,+zicond -verify-machineinstrs < %s | FileCheck %s --check-prefix=RV64ZDINX_ZICOND |
4 | | -; RUN: llc -mtriple=riscv64 -mattr=+zdinx -verify-machineinstrs < %s | FileCheck %s --check-prefix=RV64ZDINX_NOZICOND |
| 4 | +; RUN: llc -mtriple=riscv64 -mattr=+zdinx -verify-machineinstrs < %s | FileCheck %s --check-prefix=RV64ZDINX_NOZICOND |
5 | 5 |
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6 | 6 | ; Zicond with zfinx(implies by zhinx) |
7 | 7 | ; RUN: llc -mtriple=riscv64 -mattr=+zhinx,+zicond -verify-machineinstrs < %s | FileCheck %s --check-prefix=RV64ZHINX_ZICOND |
8 | 8 |
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9 | 9 | ; Baseline with classic FP registers (no *inx); zicond select should NOT trigger |
10 | | -; RUN: llc -mtriple=riscv64 -mattr=+f,+d -verify-machineinstrs < %s | FileCheck %s --check-prefix=RV64FD |
| 10 | +; RUN: llc -mtriple=riscv64 -mattr=+f,+d -verify-machineinstrs < %s | FileCheck %s --check-prefix=RV64FD |
11 | 11 |
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12 | 12 | ; Check same optimize work on 32bit machine |
13 | 13 | ; RUN: llc -mtriple=riscv32 -mattr=+zfinx,+zicond -verify-machineinstrs < %s | FileCheck %s --check-prefix=RV32ZFINX_ZICOND |
14 | | - |
| 14 | +; RUN: llc -mtriple=riscv32 -mattr=+zfinx -verify-machineinstrs < %s | FileCheck %s --check-prefix=RV32ZFINX_NOZICOND |
| 15 | +; RUN: llc -mtriple=riscv32 -mattr=+zdinx,+zicond -verify-machineinstrs < %s | FileCheck %s --check-prefix=RV32ZDINX_ZICOND |
| 16 | +; RUN: llc -mtriple=riscv32 -mattr=+zdinx -verify-machineinstrs < %s | FileCheck %s --check-prefix=RV32ZDINX_NOZICOND |
15 | 17 |
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16 | 18 | ; This test checks that floating-point SELECT is lowered through integer |
17 | 19 | ; SELECT (and thus to Zicond czero.* sequence) when FP values live in GPRs |
@@ -74,6 +76,37 @@ define float @select_f32_i1(i1 %cond, float %t, float %f) nounwind { |
74 | 76 | ; RV32ZFINX_ZICOND-NEXT: or a0, a0, a2 |
75 | 77 | ; RV32ZFINX_ZICOND-NEXT: # kill: def $x10_w killed $x10_w killed $x10 |
76 | 78 | ; RV32ZFINX_ZICOND-NEXT: ret |
| 79 | +; |
| 80 | +; RV32ZFINX_NOZICOND-LABEL: select_f32_i1: |
| 81 | +; RV32ZFINX_NOZICOND: # %bb.0: # %entry |
| 82 | +; RV32ZFINX_NOZICOND-NEXT: andi a3, a0, 1 |
| 83 | +; RV32ZFINX_NOZICOND-NEXT: mv a0, a1 |
| 84 | +; RV32ZFINX_NOZICOND-NEXT: bnez a3, .LBB0_2 |
| 85 | +; RV32ZFINX_NOZICOND-NEXT: # %bb.1: # %entry |
| 86 | +; RV32ZFINX_NOZICOND-NEXT: mv a0, a2 |
| 87 | +; RV32ZFINX_NOZICOND-NEXT: .LBB0_2: # %entry |
| 88 | +; RV32ZFINX_NOZICOND-NEXT: ret |
| 89 | +; |
| 90 | +; RV32ZDINX_ZICOND-LABEL: select_f32_i1: |
| 91 | +; RV32ZDINX_ZICOND: # %bb.0: # %entry |
| 92 | +; RV32ZDINX_ZICOND-NEXT: # kill: def $x12_w killed $x12_w def $x12 |
| 93 | +; RV32ZDINX_ZICOND-NEXT: # kill: def $x11_w killed $x11_w def $x11 |
| 94 | +; RV32ZDINX_ZICOND-NEXT: andi a0, a0, 1 |
| 95 | +; RV32ZDINX_ZICOND-NEXT: czero.nez a2, a2, a0 |
| 96 | +; RV32ZDINX_ZICOND-NEXT: czero.eqz a0, a1, a0 |
| 97 | +; RV32ZDINX_ZICOND-NEXT: or a0, a0, a2 |
| 98 | +; RV32ZDINX_ZICOND-NEXT: # kill: def $x10_w killed $x10_w killed $x10 |
| 99 | +; RV32ZDINX_ZICOND-NEXT: ret |
| 100 | +; |
| 101 | +; RV32ZDINX_NOZICOND-LABEL: select_f32_i1: |
| 102 | +; RV32ZDINX_NOZICOND: # %bb.0: # %entry |
| 103 | +; RV32ZDINX_NOZICOND-NEXT: andi a3, a0, 1 |
| 104 | +; RV32ZDINX_NOZICOND-NEXT: mv a0, a1 |
| 105 | +; RV32ZDINX_NOZICOND-NEXT: bnez a3, .LBB0_2 |
| 106 | +; RV32ZDINX_NOZICOND-NEXT: # %bb.1: # %entry |
| 107 | +; RV32ZDINX_NOZICOND-NEXT: mv a0, a2 |
| 108 | +; RV32ZDINX_NOZICOND-NEXT: .LBB0_2: # %entry |
| 109 | +; RV32ZDINX_NOZICOND-NEXT: ret |
77 | 110 | entry: |
78 | 111 | %sel = select i1 %cond, float %t, float %f |
79 | 112 | ret float %sel |
@@ -129,6 +162,47 @@ define double @select_f64_i1(i1 %cond, double %t, double %f) nounwind { |
129 | 162 | ; RV32ZFINX_ZICOND-NEXT: or a0, a1, a3 |
130 | 163 | ; RV32ZFINX_ZICOND-NEXT: or a1, a2, a4 |
131 | 164 | ; RV32ZFINX_ZICOND-NEXT: ret |
| 165 | +; |
| 166 | +; RV32ZFINX_NOZICOND-LABEL: select_f64_i1: |
| 167 | +; RV32ZFINX_NOZICOND: # %bb.0: # %entry |
| 168 | +; RV32ZFINX_NOZICOND-NEXT: andi a5, a0, 1 |
| 169 | +; RV32ZFINX_NOZICOND-NEXT: mv a0, a1 |
| 170 | +; RV32ZFINX_NOZICOND-NEXT: bnez a5, .LBB1_2 |
| 171 | +; RV32ZFINX_NOZICOND-NEXT: # %bb.1: # %entry |
| 172 | +; RV32ZFINX_NOZICOND-NEXT: mv a0, a3 |
| 173 | +; RV32ZFINX_NOZICOND-NEXT: mv a2, a4 |
| 174 | +; RV32ZFINX_NOZICOND-NEXT: .LBB1_2: # %entry |
| 175 | +; RV32ZFINX_NOZICOND-NEXT: mv a1, a2 |
| 176 | +; RV32ZFINX_NOZICOND-NEXT: ret |
| 177 | +; |
| 178 | +; RV32ZDINX_ZICOND-LABEL: select_f64_i1: |
| 179 | +; RV32ZDINX_ZICOND: # %bb.0: # %entry |
| 180 | +; RV32ZDINX_ZICOND-NEXT: andi a0, a0, 1 |
| 181 | +; RV32ZDINX_ZICOND-NEXT: czero.nez a3, a3, a0 |
| 182 | +; RV32ZDINX_ZICOND-NEXT: czero.eqz a1, a1, a0 |
| 183 | +; RV32ZDINX_ZICOND-NEXT: czero.nez a4, a4, a0 |
| 184 | +; RV32ZDINX_ZICOND-NEXT: czero.eqz a2, a2, a0 |
| 185 | +; RV32ZDINX_ZICOND-NEXT: or a0, a1, a3 |
| 186 | +; RV32ZDINX_ZICOND-NEXT: or a1, a2, a4 |
| 187 | +; RV32ZDINX_ZICOND-NEXT: ret |
| 188 | +; |
| 189 | +; RV32ZDINX_NOZICOND-LABEL: select_f64_i1: |
| 190 | +; RV32ZDINX_NOZICOND: # %bb.0: # %entry |
| 191 | +; RV32ZDINX_NOZICOND-NEXT: andi a0, a0, 1 |
| 192 | +; RV32ZDINX_NOZICOND-NEXT: bnez a0, .LBB1_2 |
| 193 | +; RV32ZDINX_NOZICOND-NEXT: # %bb.1: # %entry |
| 194 | +; RV32ZDINX_NOZICOND-NEXT: mv a7, a4 |
| 195 | +; RV32ZDINX_NOZICOND-NEXT: mv a6, a3 |
| 196 | +; RV32ZDINX_NOZICOND-NEXT: mv a4, a6 |
| 197 | +; RV32ZDINX_NOZICOND-NEXT: mv a5, a7 |
| 198 | +; RV32ZDINX_NOZICOND-NEXT: j .LBB1_3 |
| 199 | +; RV32ZDINX_NOZICOND-NEXT: .LBB1_2: |
| 200 | +; RV32ZDINX_NOZICOND-NEXT: mv a5, a2 |
| 201 | +; RV32ZDINX_NOZICOND-NEXT: mv a4, a1 |
| 202 | +; RV32ZDINX_NOZICOND-NEXT: .LBB1_3: # %entry |
| 203 | +; RV32ZDINX_NOZICOND-NEXT: mv a0, a4 |
| 204 | +; RV32ZDINX_NOZICOND-NEXT: mv a1, a5 |
| 205 | +; RV32ZDINX_NOZICOND-NEXT: ret |
132 | 206 | entry: |
133 | 207 | %sel = select i1 %cond, double %t, double %f |
134 | 208 | ret double %sel |
@@ -213,6 +287,57 @@ define double @select_f64_fcmp(double %a, double %b, double %c, double %d) nounw |
213 | 287 | ; RV32ZFINX_ZICOND-NEXT: lw s3, 12(sp) # 4-byte Folded Reload |
214 | 288 | ; RV32ZFINX_ZICOND-NEXT: addi sp, sp, 32 |
215 | 289 | ; RV32ZFINX_ZICOND-NEXT: ret |
| 290 | +; |
| 291 | +; RV32ZFINX_NOZICOND-LABEL: select_f64_fcmp: |
| 292 | +; RV32ZFINX_NOZICOND: # %bb.0: # %entry |
| 293 | +; RV32ZFINX_NOZICOND-NEXT: addi sp, sp, -32 |
| 294 | +; RV32ZFINX_NOZICOND-NEXT: sw ra, 28(sp) # 4-byte Folded Spill |
| 295 | +; RV32ZFINX_NOZICOND-NEXT: sw s0, 24(sp) # 4-byte Folded Spill |
| 296 | +; RV32ZFINX_NOZICOND-NEXT: sw s1, 20(sp) # 4-byte Folded Spill |
| 297 | +; RV32ZFINX_NOZICOND-NEXT: sw s2, 16(sp) # 4-byte Folded Spill |
| 298 | +; RV32ZFINX_NOZICOND-NEXT: sw s3, 12(sp) # 4-byte Folded Spill |
| 299 | +; RV32ZFINX_NOZICOND-NEXT: mv s1, a7 |
| 300 | +; RV32ZFINX_NOZICOND-NEXT: mv s3, a6 |
| 301 | +; RV32ZFINX_NOZICOND-NEXT: mv s0, a5 |
| 302 | +; RV32ZFINX_NOZICOND-NEXT: mv s2, a4 |
| 303 | +; RV32ZFINX_NOZICOND-NEXT: call __gtdf2 |
| 304 | +; RV32ZFINX_NOZICOND-NEXT: bgtz a0, .LBB2_2 |
| 305 | +; RV32ZFINX_NOZICOND-NEXT: # %bb.1: # %entry |
| 306 | +; RV32ZFINX_NOZICOND-NEXT: mv s2, s3 |
| 307 | +; RV32ZFINX_NOZICOND-NEXT: mv s0, s1 |
| 308 | +; RV32ZFINX_NOZICOND-NEXT: .LBB2_2: # %entry |
| 309 | +; RV32ZFINX_NOZICOND-NEXT: mv a0, s2 |
| 310 | +; RV32ZFINX_NOZICOND-NEXT: mv a1, s0 |
| 311 | +; RV32ZFINX_NOZICOND-NEXT: lw ra, 28(sp) # 4-byte Folded Reload |
| 312 | +; RV32ZFINX_NOZICOND-NEXT: lw s0, 24(sp) # 4-byte Folded Reload |
| 313 | +; RV32ZFINX_NOZICOND-NEXT: lw s1, 20(sp) # 4-byte Folded Reload |
| 314 | +; RV32ZFINX_NOZICOND-NEXT: lw s2, 16(sp) # 4-byte Folded Reload |
| 315 | +; RV32ZFINX_NOZICOND-NEXT: lw s3, 12(sp) # 4-byte Folded Reload |
| 316 | +; RV32ZFINX_NOZICOND-NEXT: addi sp, sp, 32 |
| 317 | +; RV32ZFINX_NOZICOND-NEXT: ret |
| 318 | +; |
| 319 | +; RV32ZDINX_ZICOND-LABEL: select_f64_fcmp: |
| 320 | +; RV32ZDINX_ZICOND: # %bb.0: # %entry |
| 321 | +; RV32ZDINX_ZICOND-NEXT: flt.d a0, a2, a0 |
| 322 | +; RV32ZDINX_ZICOND-NEXT: czero.nez a1, a6, a0 |
| 323 | +; RV32ZDINX_ZICOND-NEXT: czero.eqz a2, a4, a0 |
| 324 | +; RV32ZDINX_ZICOND-NEXT: czero.nez a3, a7, a0 |
| 325 | +; RV32ZDINX_ZICOND-NEXT: czero.eqz a4, a5, a0 |
| 326 | +; RV32ZDINX_ZICOND-NEXT: or a0, a2, a1 |
| 327 | +; RV32ZDINX_ZICOND-NEXT: or a1, a4, a3 |
| 328 | +; RV32ZDINX_ZICOND-NEXT: ret |
| 329 | +; |
| 330 | +; RV32ZDINX_NOZICOND-LABEL: select_f64_fcmp: |
| 331 | +; RV32ZDINX_NOZICOND: # %bb.0: # %entry |
| 332 | +; RV32ZDINX_NOZICOND-NEXT: flt.d a0, a2, a0 |
| 333 | +; RV32ZDINX_NOZICOND-NEXT: bnez a0, .LBB2_2 |
| 334 | +; RV32ZDINX_NOZICOND-NEXT: # %bb.1: # %entry |
| 335 | +; RV32ZDINX_NOZICOND-NEXT: mv a4, a6 |
| 336 | +; RV32ZDINX_NOZICOND-NEXT: mv a5, a7 |
| 337 | +; RV32ZDINX_NOZICOND-NEXT: .LBB2_2: # %entry |
| 338 | +; RV32ZDINX_NOZICOND-NEXT: mv a0, a4 |
| 339 | +; RV32ZDINX_NOZICOND-NEXT: mv a1, a5 |
| 340 | +; RV32ZDINX_NOZICOND-NEXT: ret |
216 | 341 | entry: |
217 | 342 | %cmp = fcmp ogt double %a, %b |
218 | 343 | %sel = select i1 %cmp, double %c, double %d |
@@ -289,6 +414,47 @@ define dso_local noundef half @select_half_i1(i1 %cond, half %a, half %b) nounwi |
289 | 414 | ; RV32ZFINX_ZICOND-NEXT: or a0, a0, a1 |
290 | 415 | ; RV32ZFINX_ZICOND-NEXT: # kill: def $x10_w killed $x10_w killed $x10 |
291 | 416 | ; RV32ZFINX_ZICOND-NEXT: ret |
| 417 | +; |
| 418 | +; RV32ZFINX_NOZICOND-LABEL: select_half_i1: |
| 419 | +; RV32ZFINX_NOZICOND: # %bb.0: # %entry |
| 420 | +; RV32ZFINX_NOZICOND-NEXT: # kill: def $x12_w killed $x12_w def $x12 |
| 421 | +; RV32ZFINX_NOZICOND-NEXT: andi a0, a0, 1 |
| 422 | +; RV32ZFINX_NOZICOND-NEXT: # kill: def $x11_w killed $x11_w def $x11 |
| 423 | +; RV32ZFINX_NOZICOND-NEXT: bnez a0, .LBB3_2 |
| 424 | +; RV32ZFINX_NOZICOND-NEXT: # %bb.1: # %entry |
| 425 | +; RV32ZFINX_NOZICOND-NEXT: mv a1, a2 |
| 426 | +; RV32ZFINX_NOZICOND-NEXT: .LBB3_2: # %entry |
| 427 | +; RV32ZFINX_NOZICOND-NEXT: lui a0, 1048560 |
| 428 | +; RV32ZFINX_NOZICOND-NEXT: or a0, a1, a0 |
| 429 | +; RV32ZFINX_NOZICOND-NEXT: # kill: def $x10_w killed $x10_w killed $x10 |
| 430 | +; RV32ZFINX_NOZICOND-NEXT: ret |
| 431 | +; |
| 432 | +; RV32ZDINX_ZICOND-LABEL: select_half_i1: |
| 433 | +; RV32ZDINX_ZICOND: # %bb.0: # %entry |
| 434 | +; RV32ZDINX_ZICOND-NEXT: # kill: def $x12_w killed $x12_w def $x12 |
| 435 | +; RV32ZDINX_ZICOND-NEXT: # kill: def $x11_w killed $x11_w def $x11 |
| 436 | +; RV32ZDINX_ZICOND-NEXT: andi a0, a0, 1 |
| 437 | +; RV32ZDINX_ZICOND-NEXT: czero.nez a2, a2, a0 |
| 438 | +; RV32ZDINX_ZICOND-NEXT: czero.eqz a0, a1, a0 |
| 439 | +; RV32ZDINX_ZICOND-NEXT: or a0, a0, a2 |
| 440 | +; RV32ZDINX_ZICOND-NEXT: lui a1, 1048560 |
| 441 | +; RV32ZDINX_ZICOND-NEXT: or a0, a0, a1 |
| 442 | +; RV32ZDINX_ZICOND-NEXT: # kill: def $x10_w killed $x10_w killed $x10 |
| 443 | +; RV32ZDINX_ZICOND-NEXT: ret |
| 444 | +; |
| 445 | +; RV32ZDINX_NOZICOND-LABEL: select_half_i1: |
| 446 | +; RV32ZDINX_NOZICOND: # %bb.0: # %entry |
| 447 | +; RV32ZDINX_NOZICOND-NEXT: # kill: def $x12_w killed $x12_w def $x12 |
| 448 | +; RV32ZDINX_NOZICOND-NEXT: andi a0, a0, 1 |
| 449 | +; RV32ZDINX_NOZICOND-NEXT: # kill: def $x11_w killed $x11_w def $x11 |
| 450 | +; RV32ZDINX_NOZICOND-NEXT: bnez a0, .LBB3_2 |
| 451 | +; RV32ZDINX_NOZICOND-NEXT: # %bb.1: # %entry |
| 452 | +; RV32ZDINX_NOZICOND-NEXT: mv a1, a2 |
| 453 | +; RV32ZDINX_NOZICOND-NEXT: .LBB3_2: # %entry |
| 454 | +; RV32ZDINX_NOZICOND-NEXT: lui a0, 1048560 |
| 455 | +; RV32ZDINX_NOZICOND-NEXT: or a0, a1, a0 |
| 456 | +; RV32ZDINX_NOZICOND-NEXT: # kill: def $x10_w killed $x10_w killed $x10 |
| 457 | +; RV32ZDINX_NOZICOND-NEXT: ret |
292 | 458 | entry: |
293 | 459 | %sel = select i1 %cond, half %a, half %b |
294 | 460 | ret half %sel |
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