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reduce the paramters
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llvm/lib/Target/PowerPC/PPCISelLowering.cpp

Lines changed: 7 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -15627,13 +15627,15 @@ static bool canConvertToVcmpequb(SDValue &LHS, SDValue RHS) {
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}
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SDValue convertTwoLoadsAndCmpToVCMPEQUB(SelectionDAG &DAG, SDNode *N,
15630-
const SDLoc &DL, SDValue &LHS,
15631-
SDValue RHS) {
15630+
const SDLoc &DL) {
15631+
15632+
assert(N->getOpcode() == ISD::SETCC && "Should be called with a SETCC node");
15633+
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ISD::CondCode CC = cast<CondCodeSDNode>(N->getOperand(2))->get();
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assert(CC == ISD::SETNE ||
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CC == ISD::SETEQ && "CC mus be ISD::SETNE or ISD::SETEQ");
15635-
auto *LA = dyn_cast<LoadSDNode>(LHS);
15636-
auto *LB = dyn_cast<LoadSDNode>(RHS);
15637+
auto *LA = dyn_cast<LoadSDNode>(N->getOperand(0));
15638+
auto *LB = dyn_cast<LoadSDNode>(N->getOperand(1));
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// Following code transforms the DAG
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// t0: ch,glue = EntryToken
@@ -15717,7 +15719,7 @@ SDValue PPCTargetLowering::combineSetCC(SDNode *N,
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// and one vector compare instruction.
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if (Subtarget.hasAltivec() && canConvertToVcmpequb(LHS, RHS))
15720-
return convertTwoLoadsAndCmpToVCMPEQUB(DCI.DAG, N, SDLoc(N), LHS, RHS);
15722+
return convertTwoLoadsAndCmpToVCMPEQUB(DCI.DAG, N, SDLoc(N));
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}
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return DAGCombineTruncBoolExt(N, DCI);

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