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update test cases
1 parent d2613de commit 6eb413f

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+185360
-8903
lines changed

‎llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll‎

Lines changed: 106970 additions & 823 deletions
Large diffs are not rendered by default.

‎llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.128bit.ll‎

Lines changed: 5823 additions & 520 deletions
Large diffs are not rendered by default.

‎llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.160bit.ll‎

Lines changed: 10 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -5,8 +5,8 @@
55
; RUN: llc -mtriple=amdgcn -mcpu=gfx900 -amdgpu-codegenprepare-break-large-phis-threshold=4096 < %s | FileCheck -check-prefixes=GFX9 %s
66
; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -amdgpu-codegenprepare-break-large-phis-threshold=4096 < %s | FileCheck -check-prefixes=GFX11 %s
77

8-
define <5 x float> @v_bitcast_v5i32_to_v5f32(<5 x i32> %a, i32 %b) {
9-
; GCN-LABEL: v_bitcast_v5i32_to_v5f32:
8+
define <5 x float> @bitcast_v5i32_to_v5f32(<5 x i32> %a, i32 %b) {
9+
; GCN-LABEL: bitcast_v5i32_to_v5f32:
1010
; GCN: ; %bb.0:
1111
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
1212
; GCN-NEXT: v_cmp_ne_u32_e32 vcc, 0, v5
@@ -24,7 +24,7 @@ define <5 x float> @v_bitcast_v5i32_to_v5f32(<5 x i32> %a, i32 %b) {
2424
; GCN-NEXT: s_or_b64 exec, exec, s[4:5]
2525
; GCN-NEXT: s_setpc_b64 s[30:31]
2626
;
27-
; VI-LABEL: v_bitcast_v5i32_to_v5f32:
27+
; VI-LABEL: bitcast_v5i32_to_v5f32:
2828
; VI: ; %bb.0:
2929
; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
3030
; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v5
@@ -41,7 +41,7 @@ define <5 x float> @v_bitcast_v5i32_to_v5f32(<5 x i32> %a, i32 %b) {
4141
; VI-NEXT: s_or_b64 exec, exec, s[4:5]
4242
; VI-NEXT: s_setpc_b64 s[30:31]
4343
;
44-
; GFX9-LABEL: v_bitcast_v5i32_to_v5f32:
44+
; GFX9-LABEL: bitcast_v5i32_to_v5f32:
4545
; GFX9: ; %bb.0:
4646
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
4747
; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v5
@@ -58,7 +58,7 @@ define <5 x float> @v_bitcast_v5i32_to_v5f32(<5 x i32> %a, i32 %b) {
5858
; GFX9-NEXT: s_or_b64 exec, exec, s[4:5]
5959
; GFX9-NEXT: s_setpc_b64 s[30:31]
6060
;
61-
; GFX11-LABEL: v_bitcast_v5i32_to_v5f32:
61+
; GFX11-LABEL: bitcast_v5i32_to_v5f32:
6262
; GFX11: ; %bb.0:
6363
; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
6464
; GFX11-NEXT: s_mov_b32 s0, exec_lo
@@ -92,8 +92,8 @@ end:
9292
ret <5 x float> %phi
9393
}
9494

95-
define <5 x i32> @v_bitcast_v5f32_to_v5i32(<5 x float> %a, i32 %b) {
96-
; GCN-LABEL: v_bitcast_v5f32_to_v5i32:
95+
define <5 x i32> @bitcast_v5f32_to_v5i32(<5 x float> %a, i32 %b) {
96+
; GCN-LABEL: bitcast_v5f32_to_v5i32:
9797
; GCN: ; %bb.0:
9898
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
9999
; GCN-NEXT: v_cmp_ne_u32_e32 vcc, 0, v5
@@ -111,7 +111,7 @@ define <5 x i32> @v_bitcast_v5f32_to_v5i32(<5 x float> %a, i32 %b) {
111111
; GCN-NEXT: s_or_b64 exec, exec, s[4:5]
112112
; GCN-NEXT: s_setpc_b64 s[30:31]
113113
;
114-
; VI-LABEL: v_bitcast_v5f32_to_v5i32:
114+
; VI-LABEL: bitcast_v5f32_to_v5i32:
115115
; VI: ; %bb.0:
116116
; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
117117
; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v5
@@ -128,7 +128,7 @@ define <5 x i32> @v_bitcast_v5f32_to_v5i32(<5 x float> %a, i32 %b) {
128128
; VI-NEXT: s_or_b64 exec, exec, s[4:5]
129129
; VI-NEXT: s_setpc_b64 s[30:31]
130130
;
131-
; GFX9-LABEL: v_bitcast_v5f32_to_v5i32:
131+
; GFX9-LABEL: bitcast_v5f32_to_v5i32:
132132
; GFX9: ; %bb.0:
133133
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
134134
; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v5
@@ -145,7 +145,7 @@ define <5 x i32> @v_bitcast_v5f32_to_v5i32(<5 x float> %a, i32 %b) {
145145
; GFX9-NEXT: s_or_b64 exec, exec, s[4:5]
146146
; GFX9-NEXT: s_setpc_b64 s[30:31]
147147
;
148-
; GFX11-LABEL: v_bitcast_v5f32_to_v5i32:
148+
; GFX11-LABEL: bitcast_v5f32_to_v5i32:
149149
; GFX11: ; %bb.0:
150150
; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
151151
; GFX11-NEXT: s_mov_b32 s0, exec_lo

‎llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.16bit.ll‎

Lines changed: 30 additions & 30 deletions
Original file line numberDiff line numberDiff line change
@@ -5,8 +5,8 @@
55
; RUN: llc -mtriple=amdgcn -mcpu=gfx900 -amdgpu-codegenprepare-break-large-phis-threshold=4096 < %s | FileCheck -check-prefixes=GFX9 %s
66
; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -amdgpu-codegenprepare-break-large-phis-threshold=4096 < %s | FileCheck -check-prefixes=GFX11 %s
77

8-
define half @v_bitcast_i16_to_f16(i16 %a, i32 %b) {
9-
; GCN-LABEL: v_bitcast_i16_to_f16:
8+
define half @bitcast_i16_to_f16(i16 %a, i32 %b) {
9+
; GCN-LABEL: bitcast_i16_to_f16:
1010
; GCN: ; %bb.0:
1111
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
1212
; GCN-NEXT: v_and_b32_e32 v2, 0xffff, v0
@@ -32,7 +32,7 @@ define half @v_bitcast_i16_to_f16(i16 %a, i32 %b) {
3232
; GCN-NEXT: s_or_b64 exec, exec, s[4:5]
3333
; GCN-NEXT: s_setpc_b64 s[30:31]
3434
;
35-
; VI-LABEL: v_bitcast_i16_to_f16:
35+
; VI-LABEL: bitcast_i16_to_f16:
3636
; VI: ; %bb.0:
3737
; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
3838
; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v1
@@ -45,7 +45,7 @@ define half @v_bitcast_i16_to_f16(i16 %a, i32 %b) {
4545
; VI-NEXT: s_or_b64 exec, exec, s[4:5]
4646
; VI-NEXT: s_setpc_b64 s[30:31]
4747
;
48-
; GFX9-LABEL: v_bitcast_i16_to_f16:
48+
; GFX9-LABEL: bitcast_i16_to_f16:
4949
; GFX9: ; %bb.0:
5050
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
5151
; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v1
@@ -58,7 +58,7 @@ define half @v_bitcast_i16_to_f16(i16 %a, i32 %b) {
5858
; GFX9-NEXT: s_or_b64 exec, exec, s[4:5]
5959
; GFX9-NEXT: s_setpc_b64 s[30:31]
6060
;
61-
; GFX11-LABEL: v_bitcast_i16_to_f16:
61+
; GFX11-LABEL: bitcast_i16_to_f16:
6262
; GFX11: ; %bb.0:
6363
; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
6464
; GFX11-NEXT: s_mov_b32 s0, exec_lo
@@ -88,8 +88,8 @@ end:
8888
ret half %phi
8989
}
9090

91-
define i16 @v_bitcast_f16_to_i16(half %a, i32 %b) {
92-
; GCN-LABEL: v_bitcast_f16_to_i16:
91+
define i16 @bitcast_f16_to_i16(half %a, i32 %b) {
92+
; GCN-LABEL: bitcast_f16_to_i16:
9393
; GCN: ; %bb.0:
9494
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
9595
; GCN-NEXT: v_mov_b32_e32 v2, v0
@@ -116,7 +116,7 @@ define i16 @v_bitcast_f16_to_i16(half %a, i32 %b) {
116116
; GCN-NEXT: s_or_b64 exec, exec, s[4:5]
117117
; GCN-NEXT: s_setpc_b64 s[30:31]
118118
;
119-
; VI-LABEL: v_bitcast_f16_to_i16:
119+
; VI-LABEL: bitcast_f16_to_i16:
120120
; VI: ; %bb.0:
121121
; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
122122
; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v1
@@ -129,7 +129,7 @@ define i16 @v_bitcast_f16_to_i16(half %a, i32 %b) {
129129
; VI-NEXT: s_or_b64 exec, exec, s[4:5]
130130
; VI-NEXT: s_setpc_b64 s[30:31]
131131
;
132-
; GFX9-LABEL: v_bitcast_f16_to_i16:
132+
; GFX9-LABEL: bitcast_f16_to_i16:
133133
; GFX9: ; %bb.0:
134134
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
135135
; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v1
@@ -142,7 +142,7 @@ define i16 @v_bitcast_f16_to_i16(half %a, i32 %b) {
142142
; GFX9-NEXT: s_or_b64 exec, exec, s[4:5]
143143
; GFX9-NEXT: s_setpc_b64 s[30:31]
144144
;
145-
; GFX11-LABEL: v_bitcast_f16_to_i16:
145+
; GFX11-LABEL: bitcast_f16_to_i16:
146146
; GFX11: ; %bb.0:
147147
; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
148148
; GFX11-NEXT: s_mov_b32 s0, exec_lo
@@ -172,8 +172,8 @@ end:
172172
ret i16 %phi
173173
}
174174

175-
define bfloat @v_bitcast_i16_to_bf16(i16 %a, i32 %b) {
176-
; GCN-LABEL: v_bitcast_i16_to_bf16:
175+
define bfloat @bitcast_i16_to_bf16(i16 %a, i32 %b) {
176+
; GCN-LABEL: bitcast_i16_to_bf16:
177177
; GCN: ; %bb.0:
178178
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
179179
; GCN-NEXT: v_and_b32_e32 v0, 0xffff, v0
@@ -189,7 +189,7 @@ define bfloat @v_bitcast_i16_to_bf16(i16 %a, i32 %b) {
189189
; GCN-NEXT: s_or_b64 exec, exec, s[4:5]
190190
; GCN-NEXT: s_setpc_b64 s[30:31]
191191
;
192-
; VI-LABEL: v_bitcast_i16_to_bf16:
192+
; VI-LABEL: bitcast_i16_to_bf16:
193193
; VI: ; %bb.0:
194194
; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
195195
; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v1
@@ -202,7 +202,7 @@ define bfloat @v_bitcast_i16_to_bf16(i16 %a, i32 %b) {
202202
; VI-NEXT: s_or_b64 exec, exec, s[4:5]
203203
; VI-NEXT: s_setpc_b64 s[30:31]
204204
;
205-
; GFX9-LABEL: v_bitcast_i16_to_bf16:
205+
; GFX9-LABEL: bitcast_i16_to_bf16:
206206
; GFX9: ; %bb.0:
207207
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
208208
; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v1
@@ -215,7 +215,7 @@ define bfloat @v_bitcast_i16_to_bf16(i16 %a, i32 %b) {
215215
; GFX9-NEXT: s_or_b64 exec, exec, s[4:5]
216216
; GFX9-NEXT: s_setpc_b64 s[30:31]
217217
;
218-
; GFX11-LABEL: v_bitcast_i16_to_bf16:
218+
; GFX11-LABEL: bitcast_i16_to_bf16:
219219
; GFX11: ; %bb.0:
220220
; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
221221
; GFX11-NEXT: s_mov_b32 s0, exec_lo
@@ -245,8 +245,8 @@ end:
245245
ret bfloat %phi
246246
}
247247

248-
define i16 @v_bitcast_bf16_to_i16(bfloat %a, i32 %b) {
249-
; GCN-LABEL: v_bitcast_bf16_to_i16:
248+
define i16 @bitcast_bf16_to_i16(bfloat %a, i32 %b) {
249+
; GCN-LABEL: bitcast_bf16_to_i16:
250250
; GCN: ; %bb.0:
251251
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
252252
; GCN-NEXT: v_mov_b32_e32 v2, v0
@@ -274,7 +274,7 @@ define i16 @v_bitcast_bf16_to_i16(bfloat %a, i32 %b) {
274274
; GCN-NEXT: s_or_b64 exec, exec, s[4:5]
275275
; GCN-NEXT: s_setpc_b64 s[30:31]
276276
;
277-
; VI-LABEL: v_bitcast_bf16_to_i16:
277+
; VI-LABEL: bitcast_bf16_to_i16:
278278
; VI: ; %bb.0:
279279
; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
280280
; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v1
@@ -295,7 +295,7 @@ define i16 @v_bitcast_bf16_to_i16(bfloat %a, i32 %b) {
295295
; VI-NEXT: s_or_b64 exec, exec, s[4:5]
296296
; VI-NEXT: s_setpc_b64 s[30:31]
297297
;
298-
; GFX9-LABEL: v_bitcast_bf16_to_i16:
298+
; GFX9-LABEL: bitcast_bf16_to_i16:
299299
; GFX9: ; %bb.0:
300300
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
301301
; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v1
@@ -316,7 +316,7 @@ define i16 @v_bitcast_bf16_to_i16(bfloat %a, i32 %b) {
316316
; GFX9-NEXT: s_or_b64 exec, exec, s[4:5]
317317
; GFX9-NEXT: s_setpc_b64 s[30:31]
318318
;
319-
; GFX11-LABEL: v_bitcast_bf16_to_i16:
319+
; GFX11-LABEL: bitcast_bf16_to_i16:
320320
; GFX11: ; %bb.0:
321321
; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
322322
; GFX11-NEXT: s_mov_b32 s0, exec_lo
@@ -357,8 +357,8 @@ end:
357357
ret i16 %phi
358358
}
359359

360-
define bfloat @v_bitcast_f16_to_bf16(half %a, i32 %b) {
361-
; GCN-LABEL: v_bitcast_f16_to_bf16:
360+
define bfloat @bitcast_f16_to_bf16(half %a, i32 %b) {
361+
; GCN-LABEL: bitcast_f16_to_bf16:
362362
; GCN: ; %bb.0:
363363
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
364364
; GCN-NEXT: v_cmp_ne_u32_e32 vcc, 0, v1
@@ -386,7 +386,7 @@ define bfloat @v_bitcast_f16_to_bf16(half %a, i32 %b) {
386386
; GCN-NEXT: s_or_b64 exec, exec, s[4:5]
387387
; GCN-NEXT: s_setpc_b64 s[30:31]
388388
;
389-
; VI-LABEL: v_bitcast_f16_to_bf16:
389+
; VI-LABEL: bitcast_f16_to_bf16:
390390
; VI: ; %bb.0:
391391
; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
392392
; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v1
@@ -399,7 +399,7 @@ define bfloat @v_bitcast_f16_to_bf16(half %a, i32 %b) {
399399
; VI-NEXT: s_or_b64 exec, exec, s[4:5]
400400
; VI-NEXT: s_setpc_b64 s[30:31]
401401
;
402-
; GFX9-LABEL: v_bitcast_f16_to_bf16:
402+
; GFX9-LABEL: bitcast_f16_to_bf16:
403403
; GFX9: ; %bb.0:
404404
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
405405
; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v1
@@ -412,7 +412,7 @@ define bfloat @v_bitcast_f16_to_bf16(half %a, i32 %b) {
412412
; GFX9-NEXT: s_or_b64 exec, exec, s[4:5]
413413
; GFX9-NEXT: s_setpc_b64 s[30:31]
414414
;
415-
; GFX11-LABEL: v_bitcast_f16_to_bf16:
415+
; GFX11-LABEL: bitcast_f16_to_bf16:
416416
; GFX11: ; %bb.0:
417417
; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
418418
; GFX11-NEXT: s_mov_b32 s0, exec_lo
@@ -442,8 +442,8 @@ end:
442442
ret bfloat %phi
443443
}
444444

445-
define half @v_bitcast_bf16_to_f16(bfloat %a, i32 %b) {
446-
; GCN-LABEL: v_bitcast_bf16_to_f16:
445+
define half @bitcast_bf16_to_f16(bfloat %a, i32 %b) {
446+
; GCN-LABEL: bitcast_bf16_to_f16:
447447
; GCN: ; %bb.0:
448448
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
449449
; GCN-NEXT: v_cmp_ne_u32_e32 vcc, 0, v1
@@ -472,7 +472,7 @@ define half @v_bitcast_bf16_to_f16(bfloat %a, i32 %b) {
472472
; GCN-NEXT: s_or_b64 exec, exec, s[4:5]
473473
; GCN-NEXT: s_setpc_b64 s[30:31]
474474
;
475-
; VI-LABEL: v_bitcast_bf16_to_f16:
475+
; VI-LABEL: bitcast_bf16_to_f16:
476476
; VI: ; %bb.0:
477477
; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
478478
; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v1
@@ -493,7 +493,7 @@ define half @v_bitcast_bf16_to_f16(bfloat %a, i32 %b) {
493493
; VI-NEXT: s_or_b64 exec, exec, s[4:5]
494494
; VI-NEXT: s_setpc_b64 s[30:31]
495495
;
496-
; GFX9-LABEL: v_bitcast_bf16_to_f16:
496+
; GFX9-LABEL: bitcast_bf16_to_f16:
497497
; GFX9: ; %bb.0:
498498
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
499499
; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v1
@@ -514,7 +514,7 @@ define half @v_bitcast_bf16_to_f16(bfloat %a, i32 %b) {
514514
; GFX9-NEXT: s_or_b64 exec, exec, s[4:5]
515515
; GFX9-NEXT: s_setpc_b64 s[30:31]
516516
;
517-
; GFX11-LABEL: v_bitcast_bf16_to_f16:
517+
; GFX11-LABEL: bitcast_bf16_to_f16:
518518
; GFX11: ; %bb.0:
519519
; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
520520
; GFX11-NEXT: s_mov_b32 s0, exec_lo

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